When the PCB routes the display data signals in an unconventional way, the output bus width may differ from the bus width of the connected panel or encoder. For instance, when a 18-bit RGB panel has its R[5:0], G[5:0] and B[5:0] signals connected to LCD_DATA[7:2], LCD_DATA[15:10] and LCD_DATA[23:18], the output bus width is 24 instead of 18 when the signals are routed to LCD_DATA[5:0], LCD_DATA[11:6] and LCD_DATA[17:12].
Add a bus-width property to describe this data routing.
Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com --- Changes since v1:
- Fix property name in binding --- .../devicetree/bindings/display/fsl,lcdif.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml index 404bd516b7f5..14b6103a9bd1 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -58,6 +58,18 @@ properties: type: object
properties: + bus-width: + enum: [16, 18, 24] + description: | + The output bus width. This value overrides the configuration + derived from the connected device (encoder or panel). It should + only be specified when PCB routing of the data signals require a + different bus width on the LCDIF and the connected device. For + instance, when a 18-bit RGB panel has its R[5:0], G[5:0] and + B[5:0] signals connected to LCD_DATA[7:2], LCD_DATA[15:10] and + LCD_DATA[23:18] instead of LCD_DATA[5:0], LCD_DATA[11:6] and + LCD_DATA[17:12], bus-width should be set to 24. + remote-endpoint: $ref: /schemas/types.yaml#/definitions/phandle