On 4/30/20 3:46 PM, Schrempf Frieder wrote:
- /*
* On i.MX8MM there is an interrupt getting triggered immediately
* after requesting the IRQ, which leads to a stall as the handler
* accesses the GPU registers whithout the clock being enabled.
* Enabling the clocks briefly seems to clear the IRQ state, so we do
* this here before requesting the IRQ.
*/
- err = etnaviv_gpu_clk_enable(gpu);
- if (err)
return err;
- err = etnaviv_gpu_clk_disable(gpu);
- if (err)
return err;
- err = devm_request_irq(&pdev->dev, gpu->irq, irq_handler, 0,
dev_name(gpu->dev), gpu);
- if (err) {
dev_err(dev, "failed to request IRQ%u: %d\n", gpu->irq, err);
return err;
- }
Shouldn't you disable the clk after devm_request_irq is called?