The SPI on Tegra belongs to the core power domain and we're going to enable GENPD support for the core domain. Now SPI driver must use OPP API for driving the controller's clock rate because OPP API takes care of reconfiguring the domain's performance state in accordance to the rate. Add OPP support to the driver.
Acked-by: Mark Brown broonie@kernel.org Signed-off-by: Dmitry Osipenko digetx@gmail.com --- drivers/spi/spi-tegra20-slink.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index 8ce840c7ecc8..1a92978d2120 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c @@ -18,12 +18,15 @@ #include <linux/kthread.h> #include <linux/module.h> #include <linux/platform_device.h> +#include <linux/pm_opp.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/reset.h> #include <linux/spi/spi.h>
+#include <soc/tegra/common.h> + #define SLINK_COMMAND 0x000 #define SLINK_BIT_LENGTH(x) (((x) & 0x1f) << 0) #define SLINK_WORD_SIZE(x) (((x) & 0x1f) << 5) @@ -680,7 +683,7 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi, bits_per_word = t->bits_per_word; speed = t->speed_hz; if (speed != tspi->cur_speed) { - clk_set_rate(tspi->clk, speed * 4); + dev_pm_opp_set_rate(tspi->dev, speed * 4); tspi->cur_speed = speed; }
@@ -1082,6 +1085,11 @@ static int tegra_slink_probe(struct platform_device *pdev) init_completion(&tspi->xfer_completion);
pm_runtime_enable(&pdev->dev); + + ret = devm_tegra_core_dev_init_opp_table_common(&pdev->dev); + if (ret) + goto exit_pm_disable; + ret = pm_runtime_resume_and_get(&pdev->dev); if (ret) { dev_err(&pdev->dev, "pm runtime get failed, e = %d\n", ret);