On Mon, Dec 06, 2021 at 10:26:50PM +0100, David Heidelberg wrote:
Convert into YAML format into format, which can be validated.
Changes:
- drop panel from example
Signed-off-by: David Heidelberg david@ixit.cz
.../display/rockchip/dw_mipi_dsi_rockchip.txt | 93 -------- .../rockchip/rockchip,dw-mipi-dsi.yaml | 200 ++++++++++++++++++ 2 files changed, 200 insertions(+), 93 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml
diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt deleted file mode 100644 index 39792f051d2d..000000000000 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ /dev/null @@ -1,93 +0,0 @@
-Rockchip specific extensions to the Synopsys Designware MIPI DSI
-Required properties: -- #address-cells: Should be <1>. -- #size-cells: Should be <0>. -- compatible: one of
- "rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"
- "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"
- "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"
-- reg: Represent the physical address range of the controller. -- interrupts: Represent the controller's interrupt to the CPU(s). -- clocks, clock-names: Phandles to the controller's pll reference
- clock(ref) when using an internal dphy and APB clock(pclk).
- For RK3399, a phy config clock (phy_cfg) and a grf clock(grf)
- are required. As described in [1].
-- rockchip,grf: this soc should set GRF regs to mux vopl/vopb. -- ports: contain a port node with endpoint definitions as defined in [2].
- For vopb,set the reg = <0> and set the reg = <1> for vopl.
-- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl -- video port 1 for either a panel or subsequent encoder
-Optional properties: -- phys: from general PHY binding: the phandle for the PHY device. -- phy-names: Should be "dphy" if phys references an external phy. -- #phy-cells: Defined when used as ISP phy, should be 0. -- power-domains: a phandle to mipi dsi power domain node. -- resets: list of phandle + reset specifier pairs, as described in [3]. -- reset-names: string reset name, must be "apb".
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/media/video-interfaces.txt -[3] Documentation/devicetree/bindings/reset/reset.txt
-Example:
- mipi_dsi: mipi@ff960000 {
#address-cells = <1>;#size-cells = <0>;compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";reg = <0xff960000 0x4000>;interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPI_DSI0>;clock-names = "ref", "pclk";resets = <&cru SRST_MIPIDSI0>;reset-names = "apb";rockchip,grf = <&grf>;ports {#address-cells = <1>;#size-cells = <0>;mipi_in: port@0 {reg = <0>;#address-cells = <1>;#size-cells = <0>;mipi_in_vopb: endpoint@0 {reg = <0>;remote-endpoint = <&vopb_out_mipi>;};mipi_in_vopl: endpoint@1 {reg = <1>;remote-endpoint = <&vopl_out_mipi>;};};mipi_out: port@1 {reg = <1>;#address-cells = <1>;#size-cells = <0>;mipi_out_panel: endpoint {remote-endpoint = <&panel_in_mipi>;};};};panel {compatible ="boe,tv080wum-nl0";reg = <0>;enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;pinctrl-names = "default";pinctrl-0 = <&lcd_en>;backlight = <&backlight>;port {panel_in_mipi: endpoint {remote-endpoint = <&mipi_out_panel>;};};};- };
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml new file mode 100644 index 000000000000..7efa201e0e51 --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml @@ -0,0 +1,200 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Rockchip specific extensions to the Synopsys Designware MIPI DSI
+maintainers:
- opensource@rock-chips.com
+allOf:
- if:
properties:compatible:contains:const: rockchip,px30-mipi-dsithen:properties:clocks:maxItems: 1clock-names:items:- const: pclk
It's amazing that this version of the h/w can work without a reference clock. I only point that out because it means you can't really use bridge/snps,dw-mipi-dsi.yaml...
- if:
properties:compatible:contains:const: rockchip,rk3288-mipi-dsithen:properties:clocks:maxItems: 2clock-names:items:- const: ref- const: pclk
- if:
properties:compatible:contains:const: rockchip,rk3399-mipi-dsithen:properties:clocks:minItems: 4maxItems: 4clock-names:items:- const: ref- const: pclk- const: phy_cfg- const: grf+properties:
- compatible:
- oneOf:
- items:- enum:- rockchip,px30-mipi-dsi- rockchip,rk3288-mipi-dsi- rockchip,rk3399-mipi-dsi- const: snps,dw-mipi-dsi- items:- const: rockchip,px30-mipi-dsi- items:- const: rockchip,rk3288-mipi-dsi- items:- const: rockchip,rk3399-mipi-dsi- reg:
- maxItems: 1
- interrupts:
- maxItems: 1
- clocks: true
- clock-names: true
- phys:
- maxItems: 1
- description: The external PHY
- phy-names:
- const: dphy
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- properties:
port@0:$ref: /schemas/graph.yaml#/$defs/port-baseunevaluatedProperties: false
You are not defining any extra port or endpoint properties, so you can use '/schemas/graph.yaml#/properties/port' here.
description: >Video port for the VOP input.properties:endpoint@0:$ref: /schemas/graph.yaml#/properties/endpointdescription: Connection to the VOPBendpoint@1:$ref: /schemas/graph.yaml#/properties/endpointdescription: Connection to the VOPLrequired:- endpoint@0port@1:$ref: /schemas/graph.yaml#/properties/portdescription: >Video port for panel or subsequent encoder- required:
- port@0- port@1- resets:
- maxItems: 1
- reset-names:
- items:
- const: apb- rockchip,grf:
- $ref: /schemas/types.yaml#/definitions/phandle
- description:
phandle to the GRF to mux vopl/vopb- power-domains: true
- '#address-cells':
- const: 1
- '#phy-cells':
- const: 0
- '#size-cells':
- const: 0
+required:
- compatible
- reg
- clocks
- rockchip,grf
- ports
- '#address-cells'
- '#size-cells'
+additionalProperties: true
This is pretty much never right except for common bindings referenced by another schema. You need to reference dsi-controller.yaml and use 'unevaluatedProperties: false'.
+examples:
- |
- #include <dt-bindings/clock/rk3288-cru.h>
- mipi_dsi: mipi@ff960000 {
dsi@...
#address-cells = <1>;#size-cells = <0>;compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";reg = <0xff960000 0x4000>;interrupts = <0 83 4>;clocks = <&cru 148>, <&cru PCLK_MIPI_DSI0>;clock-names = "ref", "pclk";resets = <&cru SRST_MIPIDSI0>;reset-names = "apb";rockchip,grf = <&grf>;ports {#address-cells = <1>;#size-cells = <0>;mipi_in: port@0 {reg = <0>;#address-cells = <1>;#size-cells = <0>;mipi_in_vopb: endpoint@0 {reg = <0>;remote-endpoint = <&vopb_out_mipi>;};mipi_in_vopl: endpoint@1 {reg = <1>;remote-endpoint = <&vopl_out_mipi>;};};mipi_out: port@1 {reg = <1>;#address-cells = <1>;#size-cells = <0>;mipi_out_panel: endpoint {remote-endpoint = <&panel_in_mipi>;};};};- };
-- 2.33.0