Hi Maxime,
On Wed, Jan 09, 2019 at 10:33:24AM +0100, Maxime Ripard wrote:
The Cadence D-PHY bindings was defined as part of the DSI block so far. However, since it's now going to be a separate driver, we need to move the binding to a file of its own.
Signed-off-by: Maxime Ripard maxime.ripard@bootlin.com
Reviewed-by: Sakari Ailus sakari.ailus@linux.intel.com
Could you also send this to the devicetree list, please?
Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt | 21 +------- Documentation/devicetree/bindings/phy/cdns,dphy.txt | 20 +++++++- 2 files changed, 20 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/cdns,dphy.txt
diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt index f5725bb6c61c..525a4bfd8634 100644 --- a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt +++ b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt @@ -31,28 +31,7 @@ Required subnodes:
- one subnode per DSI device connected on the DSI bus. Each DSI device should contain a reg property encoding its virtual channel.
-Cadence DPHY
-Cadence DPHY block.
-Required properties: -- compatible: should be set to "cdns,dphy". -- reg: physical base address and length of the DPHY registers. -- clocks: DPHY reference clocks. -- clock-names: must contain "psm" and "pll_ref". -- #phy-cells: must be set to 0.
Example:
- dphy0: dphy@fd0e0000{
compatible = "cdns,dphy";reg = <0x0 0xfd0e0000 0x0 0x1000>;clocks = <&psm_clk>, <&pll_ref_clk>;clock-names = "psm", "pll_ref";#phy-cells = <0>;- };
- dsi0: dsi@fd0c0000 { compatible = "cdns,dsi"; reg = <0x0 0xfd0c0000 0x0 0x1000>;
diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy.txt b/Documentation/devicetree/bindings/phy/cdns,dphy.txt new file mode 100644 index 000000000000..1095bc4e72d9 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/cdns,dphy.txt @@ -0,0 +1,20 @@ +Cadence DPHY +============
+Cadence DPHY block.
+Required properties: +- compatible: should be set to "cdns,dphy". +- reg: physical base address and length of the DPHY registers. +- clocks: DPHY reference clocks. +- clock-names: must contain "psm" and "pll_ref". +- #phy-cells: must be set to 0.
+Example:
- dphy0: dphy@fd0e0000{
compatible = "cdns,dphy";reg = <0x0 0xfd0e0000 0x0 0x1000>;clocks = <&psm_clk>, <&pll_ref_clk>;clock-names = "psm", "pll_ref";#phy-cells = <0>;- };
-- git-series 0.9.1