Some CRTC drivers (like Exynos DRM Mixer) can handle blocking register updates only on per-device level, not per-plane level. This patch changes exynos_crts atomic_begin/atomic_flush callbacks to handle the entire crtc, instead of given planes, so driver can handle both cases on their own.
Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 14 ++++++++------ drivers/gpu/drm/exynos/exynos7_drm_decon.c | 14 ++++++++------ drivers/gpu/drm/exynos/exynos_drm_crtc.c | 20 ++++---------------- drivers/gpu/drm/exynos/exynos_drm_drv.h | 10 ++++------ drivers/gpu/drm/exynos/exynos_drm_fimd.c | 14 ++++++++------ 5 files changed, 32 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 77073d8faaa3..1bf6a21130c7 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c @@ -248,15 +248,16 @@ static void decon_shadow_protect_win(struct decon_context *ctx, int win, protect ? ~0 : 0); }
-static void decon_atomic_begin(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_begin(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i;
if (test_bit(BIT_SUSPENDED, &ctx->flags)) return;
- decon_shadow_protect_win(ctx, plane->index, true); + for (i = ctx->first_win; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, true); }
#define BIT_VAL(x, e, s) (((x) & ((1 << ((e) - (s) + 1)) - 1)) << (s)) @@ -336,15 +337,16 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0); }
-static void decon_atomic_flush(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_flush(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i;
if (test_bit(BIT_SUSPENDED, &ctx->flags)) return;
- decon_shadow_protect_win(ctx, plane->index, false); + for (i = ctx->first_win; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, false);
if (ctx->out_type == IFTYPE_I80) set_bit(BIT_WIN_UPDATED, &ctx->flags); diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c index 8911f965b06c..52bda3b42fe0 100644 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c @@ -385,15 +385,16 @@ static void decon_shadow_protect_win(struct decon_context *ctx, writel(val, ctx->regs + SHADOWCON); }
-static void decon_atomic_begin(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_begin(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i;
if (ctx->suspended) return;
- decon_shadow_protect_win(ctx, plane->index, true); + for (i = 0; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, true); }
static void decon_update_plane(struct exynos_drm_crtc *crtc, @@ -517,15 +518,16 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, writel(val, ctx->regs + DECON_UPDATE); }
-static void decon_atomic_flush(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void decon_atomic_flush(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int i;
if (ctx->suspended) return;
- decon_shadow_protect_win(ctx, plane->index, false); + for (i = 0; i < WINDOWS_NR; i++) + decon_shadow_protect_win(ctx, i, false); }
static void decon_init(struct decon_context *ctx) diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index efecd916f797..150a43025861 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -68,32 +68,20 @@ static void exynos_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state) { struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); - struct drm_plane *plane;
exynos_crtc->event = crtc->state->event;
- drm_atomic_crtc_for_each_plane(plane, crtc) { - struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); - - if (exynos_crtc->ops->atomic_begin) - exynos_crtc->ops->atomic_begin(exynos_crtc, - exynos_plane); - } + if (exynos_crtc->ops->atomic_begin) + exynos_crtc->ops->atomic_begin(exynos_crtc); }
static void exynos_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state) { struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); - struct drm_plane *plane;
- drm_atomic_crtc_for_each_plane(plane, crtc) { - struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); - - if (exynos_crtc->ops->atomic_flush) - exynos_crtc->ops->atomic_flush(exynos_crtc, - exynos_plane); - } + if (exynos_crtc->ops->atomic_flush) + exynos_crtc->ops->atomic_flush(exynos_crtc); }
static const struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index f0827dbebb7d..17b5ded72ff1 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -123,8 +123,8 @@ struct exynos_drm_plane_config { * @wait_for_vblank: wait for vblank interrupt to make sure that * hardware overlay is updated. * @atomic_check: validate state - * @atomic_begin: prepare a window to receive a update - * @atomic_flush: mark the end of a window update + * @atomic_begin: prepare device to receive an update + * @atomic_flush: mark the end of device update * @update_plane: apply hardware specific overlay data to registers. * @disable_plane: disable hardware specific overlay. * @te_handler: trigger to transfer video image at the tearing effect @@ -144,14 +144,12 @@ struct exynos_drm_crtc_ops { void (*wait_for_vblank)(struct exynos_drm_crtc *crtc); int (*atomic_check)(struct exynos_drm_crtc *crtc, struct drm_crtc_state *state); - void (*atomic_begin)(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane); + void (*atomic_begin)(struct exynos_drm_crtc *crtc); void (*update_plane)(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane); void (*disable_plane)(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane); - void (*atomic_flush)(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane); + void (*atomic_flush)(struct exynos_drm_crtc *crtc); void (*te_handler)(struct exynos_drm_crtc *crtc); void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable); }; diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 6ae1b1e55783..70194d0e4fe4 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -622,26 +622,28 @@ static void fimd_shadow_protect_win(struct fimd_context *ctx, writel(val, ctx->regs + reg); }
-static void fimd_atomic_begin(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void fimd_atomic_begin(struct exynos_drm_crtc *crtc) { struct fimd_context *ctx = crtc->ctx; + int i;
if (ctx->suspended) return;
- fimd_shadow_protect_win(ctx, plane->index, true); + for (i = 0; i < WINDOWS_NR; i++) + fimd_shadow_protect_win(ctx, i, true); }
-static void fimd_atomic_flush(struct exynos_drm_crtc *crtc, - struct exynos_drm_plane *plane) +static void fimd_atomic_flush(struct exynos_drm_crtc *crtc) { struct fimd_context *ctx = crtc->ctx; + int i;
if (ctx->suspended) return;
- fimd_shadow_protect_win(ctx, plane->index, false); + for (i = 0; i < WINDOWS_NR; i++) + fimd_shadow_protect_win(ctx, i, false); }
static void fimd_update_plane(struct exynos_drm_crtc *crtc,