Re: [PATCH v2 07/17] drm/msm/dpu: add writeback blocks to DPU RM

On 20/04/2022 04:45, Abhinav Kumar wrote:

Add writeback blocks to DPU resource manager so that the encoders can directly request them through RM.

changes in v2:

• stop global tracking of WB blocks similar to INTF
• align usage of hw_wb to be similar to that of hw_intf

Signed-off-by: Abhinav Kumar quic_abhinavk@quicinc.com

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 12 ++++++++++++ 2 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 0e6634b..bb01d31 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -9,6 +9,7 @@ #include "dpu_hw_ctl.h" #include "dpu_hw_pingpong.h" #include "dpu_hw_intf.h" +#include "dpu_hw_wb.h" #include "dpu_hw_dspp.h" #include "dpu_hw_merge3d.h" #include "dpu_hw_dsc.h" @@ -87,6 +88,9 @@ int dpu_rm_destroy(struct dpu_rm *rm) } }

• for (i = 0; i < ARRAY_SIZE(rm->hw_wb); i++)

• dpu_hw_wb_destroy(rm->hw_wb[i]);
  

• return 0; }

@@ -186,6 +190,24 @@ int dpu_rm_init(struct dpu_rm *rm, rm->hw_intf[intf->id - INTF_0] = hw; }

• for (i = 0; i < cat->wb_count; i++) {

• struct dpu_hw_wb *hw;
  

• const struct dpu_wb_cfg *wb = &cat->wb[i];
  

• if (wb->id < WB_0 || wb->id >= WB_MAX) {
  

• 	DPU_ERROR("skip intf %d with invalid id\n", wb->id);
  

• 	continue;
  

• }
  

• hw = dpu_hw_wb_init(wb->id, mmio, cat);
  

• if (IS_ERR_OR_NULL(hw)) {
  

Just IS_ERR() please.

• 	rc = PTR_ERR(hw);
  

• 	DPU_ERROR("failed wb object creation: err %d\n", rc);
  

• 	goto fail;
  

• }
  

• rm->hw_wb[wb->id - WB_0] = hw;
  

• }
• for (i = 0; i < cat->ctl_count; i++) { struct dpu_hw_ctl *hw; const struct dpu_ctl_cfg *ctl = &cat->ctl[i];

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 32e0d8a..ba82e54 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -19,6 +19,7 @@ struct dpu_global_state;

• @mixer_blks: array of layer mixer hardware resources
• @ctl_blks: array of ctl hardware resources
• @hw_intf: array of intf hardware resources

• • @hw_wb: array of wb hardware resources
  • @dspp_blks: array of dspp hardware resources
  */ struct dpu_rm {

@@ -26,6 +27,7 @@ struct dpu_rm { struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0]; struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0]; struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0];

• struct dpu_hw_wb *hw_wb[WB_MAX - WB_0]; struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; struct dpu_hw_blk *dsc_blks[DSC_MAX - DSC_0];

@@ -96,5 +98,15 @@ static inline struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_in return rm->hw_intf[intf_idx - INTF_0]; }

+/**

• • dpu_rm_get_wb - Return a struct dpu_hw_wb instance given it's index.
• • @rm: DPU Resource Manager handle
• • @wb_idx: WB index
• */

+static inline struct dpu_hw_wb *dpu_rm_get_wb(struct dpu_rm *rm, enum dpu_intf wb_idx) +{

• return rm->hw_wb[wb_idx - WB_0];

+}

• #endif /* __DPU_RM_H__ */