Re: [PATCH] drm/imx: ipuv3-plane: add zpos property

Hi Philipp,

Tested-By: Marius Vlad marius.vlad@collabora.com

Thanks!

On Fri, Feb 15, 2019 at 11:17:59AM +0100, Philipp Zabel wrote:

Hi,

I have added (most of) you to Cc: because I think you have either recently or significantly touched zpos property code. Could I ask for a review or ack of this patch from zpos point of view?

If you have tested this patch, a Tested-by: would be appreciated as well.

regards Philipp

On Mon, 2018-12-03 at 10:49 +0100, Philipp Zabel wrote:

...

Add a zpos property to planes. Call drm_atomic_helper_check() instead of calling drm_atomic_helper_check_modeset() and drm_atomic_check_planes() manually. This effectively adds a call to drm_atoimic_normalize_zpos()

Small typo.

...

before checking planes. Reorder atomic update to allow changing plane zpos without modeset.

``, by using global alpha (of the combining unit)''?

...

Note that the initial zpos is set in ipu_plane_state_reset(). The initial value set in ipu_plane_init() is just for show. The zpos parameter of drm_plane_create_zpos_property() is ignored because the newly created plane do not have state yet.

Signed-off-by: Philipp Zabel p.zabel@pengutronix.de

drivers/gpu/drm/imx/imx-drm-core.c | 7 ++-- drivers/gpu/drm/imx/ipuv3-plane.c | 56 +++++++++++++++++------------- 2 files changed, 33 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c index 820c7e3878f0..687cfb9d410e 100644 --- a/drivers/gpu/drm/imx/imx-drm-core.c +++ b/drivers/gpu/drm/imx/imx-drm-core.c @@ -49,11 +49,7 @@ static int imx_drm_atomic_check(struct drm_device *dev, { int ret;

• ret = drm_atomic_helper_check_modeset(dev, state);
• if (ret)

• return ret;
  

• ret = drm_atomic_helper_check_planes(dev, state);

• ret = drm_atomic_helper_check(dev, state); if (ret) return ret;

@@ -229,6 +225,7 @@ static int imx_drm_bind(struct device *dev) drm->mode_config.funcs = &imx_drm_mode_config_funcs; drm->mode_config.helper_private = &imx_drm_mode_config_helpers; drm->mode_config.allow_fb_modifiers = true;

• drm->mode_config.normalize_zpos = true;

  drm_mode_config_init(drm);

diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index d6d9ab5b33db..508ce655d638 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -273,6 +273,7 @@ static void ipu_plane_destroy(struct drm_plane *plane)

static void ipu_plane_state_reset(struct drm_plane *plane) {

• unsigned int zpos = (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1; struct ipu_plane_state *ipu_state;

  if (plane->state) {

@@ -284,8 +285,11 @@ static void ipu_plane_state_reset(struct drm_plane *plane)

ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);

• if (ipu_state)

• if (ipu_state) { __drm_atomic_helper_plane_reset(plane, &ipu_state->base);

• ipu_state->base.zpos = zpos;
  

• ipu_state->base.normalized_zpos = zpos;
  

• }

}

static struct drm_plane_state * @@ -560,6 +564,25 @@ static void ipu_plane_atomic_update(struct drm_plane *plane, if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG) ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);

• switch (ipu_plane->dp_flow) {

• case IPU_DP_FLOW_SYNC_BG:

• if (state->normalized_zpos == 1) {
  

• 	ipu_dp_set_global_alpha(ipu_plane->dp,
  

• 				!fb->format->has_alpha, 0xff,
  

• 				true);
  

• } else {
  

• 	ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  

• }
  

• break;
  

• case IPU_DP_FLOW_SYNC_FG:

• if (state->normalized_zpos == 1) {
  

• 	ipu_dp_set_global_alpha(ipu_plane->dp,
  

• 				!fb->format->has_alpha, 0xff,
  

• 				false);
  

• }
  

• break;
  

• }

• eba = drm_plane_state_to_eba(state, 0);

  /*

@@ -596,34 +619,11 @@ static void ipu_plane_atomic_update(struct drm_plane *plane, switch (ipu_plane->dp_flow) { case IPU_DP_FLOW_SYNC_BG: ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);

• ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  

  break; case IPU_DP_FLOW_SYNC_FG: ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_UNKNOWN);

• /* Enable local alpha on partial plane */
  

• switch (fb->format->format) {
  

• case DRM_FORMAT_ARGB1555:
  

• case DRM_FORMAT_ABGR1555:
  

• case DRM_FORMAT_RGBA5551:
  

• case DRM_FORMAT_BGRA5551:
  

• case DRM_FORMAT_ARGB4444:
  

• case DRM_FORMAT_ARGB8888:
  

• case DRM_FORMAT_ABGR8888:
  

• case DRM_FORMAT_RGBA8888:
  

• case DRM_FORMAT_BGRA8888:
  

• case DRM_FORMAT_RGB565_A8:
  

• case DRM_FORMAT_BGR565_A8:
  

• case DRM_FORMAT_RGB888_A8:
  

• case DRM_FORMAT_BGR888_A8:
  

• case DRM_FORMAT_RGBX8888_A8:
  

• case DRM_FORMAT_BGRX8888_A8:
  

• 	ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
  

• 	break;
  

• default:
  

• 	ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  

• 	break;
  

• }
  

• break;
  

  }

  ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));

@@ -826,6 +826,7 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu, { struct ipu_plane *ipu_plane; const uint64_t *modifiers = ipu_format_modifiers;

• unsigned int zpos = (type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1; int ret;

  DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",

@@ -856,5 +857,10 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,

drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);

• if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG)

• drm_plane_create_zpos_property(&ipu_plane->base, zpos, 0, 1);
  

• else

• drm_plane_create_zpos_immutable_property(&ipu_plane->base, 0);
  

• return ipu_plane;

}