Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:50:01 EEST Ulrich Hecht wrote:
From: Koji Matsuoka koji.matsuoka.xm@renesas.com
Signed-off-by: Koji Matsuoka koji.matsuoka.xm@renesas.com Signed-off-by: Takeshi Kihara takeshi.kihara.df@renesas.com Signed-off-by: Ulrich Hecht uli+renesas@fpond.eu
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index a8e8f26..bd5c6fa 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -2,7 +2,7 @@ /*
- Device Tree Source for the Draak board
- Copyright (C) 2016 Renesas Electronics Corp.
*/
- Copyright (C) 2016-2018 Renesas Electronics Corp.
- Copyright (C) 2017 Glider bvba
@@ -269,8 +269,10 @@
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&x12_clk>;- clock-names = "du.0", "du.1", "dclkin.0";
<&x12_clk>,<&extal_clk>;- clock-names = "du.0", "du.1",
"dclkin.0", "extal";
This should be moved to the LVDS encoder DT node.
ports { port@0 {