Hi,
On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke mka@chromium.org wrote:
Get the ref clock of the PHY from the device tree instead of hardcoding its name and rate.
Signed-off-by: Matthias Kaehlcke mka@chromium.org
Changes in v2:
- patch added to the series
drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 29 +++++++++++++++------- 1 file changed, 20 insertions(+), 9 deletions(-)
Generally same feedback as with "28nm 8960 PHY" patch, plus...
@@ -81,6 +80,7 @@ struct dsi_pll_28nm { struct platform_device *pdev; void __iomem *mmio;
struct clk *vco_ref_clk; int vco_delay; /* private clocks: */@@ -139,6 +139,7 @@ static int dsi_pll_28nm_clk_set_rate(struct clk_hw *hw, unsigned long rate, struct dsi_pll_28nm *pll_28nm = to_pll_28nm(pll); struct device *dev = &pll_28nm->pdev->dev; void __iomem *base = pll_28nm->mmio;
u64 ref_clk_rate = parent_rate;
Are you sure it's good to stash this in a u64 instead of just using the parent_rate directly?