From: Sean Paul seanpaul@chromium.org
Instead of just waiting 20ms for training to complete, actually poll the status to ensure training is finished.
Changes in v3: - Added to the set
Cc: Sandeep Panda spanda@codeaurora.org Signed-off-by: Sean Paul seanpaul@chromium.org --- drivers/gpu/drm/bridge/ti-sn65dsi86.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index f02bdedae1e5e..d3e27e52ea759 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -493,7 +493,17 @@ static void ti_sn_bridge_enable(struct drm_bridge *bridge)
/* Semi auto link training mode */ regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A); - msleep(20); /* 20ms delay recommended by spec */ + ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val, + val == ML_TX_MAIN_LINK_OFF || + val == ML_TX_NORMAL_MODE, 1000, + 500 * 1000); + if (ret) { + DRM_ERROR("Training complete polling failed (%d)\n", ret); + return; + } else if (val == ML_TX_MAIN_LINK_OFF) { + DRM_ERROR("Link training failed, link is off\n"); + return; + }
/* config video parameters */ ti_sn_bridge_set_video_timings(pdata);