RE: [2/2] drm/amd: use fixed dsc bits-per-pixel from edid

[Public]

Hi,

Thanks for the patch and it LGTM. Feel free to add Reviewed-by: Wayne Lin Wayne.Lin@amd.com

-----Original Message----- From: Yaroslav Bolyukin iam@lach.pw Sent: Sunday, February 13, 2022 9:31 PM To: linux-kernel@vger.kernel.org; dri-devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org Cc: Thomas Zimmermann tzimmermann@suse.de; David Airlie airlied@linux.ie; Rodrigo Siqueira Rodrigo.Siqueira@amd.com; Pan, Xinhui Xinhui.Pan@amd.com; Leo Li sunpeng.li@amd.com; Alex Deucher alexander.deucher@amd.com; Christian K?nig christian.koenig@amd.com; Yaroslav Bolyukin iam@lach.pw Subject: [2/2] drm/amd: use fixed dsc bits-per-pixel from edid

VESA vendor header from DisplayID spec may contain fixed bit per pixel rate, it should be respected by drm driver

Signed-off-by: Yaroslav Bolyukin iam@lach.pw

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 ++ drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 ++- drivers/gpu/drm/amd/display/dc/dc_types.h | 3 +++ 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index 29f07c26d..b34dd89ae 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -118,6 +118,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps(

  edid_caps->edid_hdmi = connector->display_info.is_hdmi;

• edid_caps->dsc_fixed_bits_per_pixel_x16 =
  

+connector->display_info.dp_dsc_bpp;

• sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
  if (sad_count <= 0)
          return result;
  

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index 57cf4cb82..f8516ec70 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -105,6 +105,8 @@ static bool dc_stream_construct(struct dc_stream_state *stream,

  /* EDID CAP translation for HDMI 2.0 */
  stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;

• stream->timing.dsc_fixed_bits_per_pixel_x16 =
  

•         dc_sink_data->edid_caps.dsc_fixed_bits_per_pixel_x16;
  
  memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));
  stream->timing.dsc_cfg.num_slices_h = 0; @@ -738,4 +740,3 @@ void dc_stream_log(const struct dc *dc, const struct
  

dc_stream_state *stream) "\tlink: %d\n", stream->link->link_index); }

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 0285a4b38..ce2e11d70 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -227,6 +227,9 @@ struct dc_edid_caps { bool edid_hdmi; bool hdr_supported;

• /* DisplayPort caps */
  

• uint32_t dsc_fixed_bits_per_pixel_x16;
  

• struct dc_panel_patch panel_patch;
  

};

-- Regards, Wayne Lin