Hi Alex,
Sorry for the late reply. I tried the patch on our mipsel platform, but got the following: [ 1.335937] [drm] Loading RS780 Microcode [ 1.910156] [drm:r600_ring_test] *ERROR* radeon: ring test failed (scratch(0x8504)=0xCAFEDEAD) [ 1.917968] radeon 0000:01:05.0: disabling GPU acceleration
The platform is equipped with 1G memory, and the physical address layout is: [0-256M] physical memory [256M - 4352M] hole [4352M - ] physical memory After applying the patch, the ring buffer BO is allocated at physical address(and is equal to the bus address) near 5G.
I doubt RS780 fails to access such high bus address? (I can't validate it on X86+rs780e, since I doesn't have >4G memory at hand, could somebody please to validate it?)
BTW, I found radeon_gart_bind() will call pci_map_page(), it hooks to swiotlb_map_page on our platform, which seems allocates and returns dma_addr_t of a new page from pool if not meet dma_mask. Seems a bug, since the BO backed by one set of pages, but mapped to GART was another set of pages?
Regards, -- cee1
2011/10/5 alexdeucher@gmail.com
From: Alex Deucher alexander.deucher@amd.com
If a card wasn't PCIE, we always set the DMA mask to 32 bits. This is only applies to the old rage128/r1xx gart block on early radeon asics (~r1xx-r4xx). Newer PCI and IGP cards can handle 40 bits just fine.
Signed-off-by: Alex Deucher alexander.deucher@amd.com Cc: Chen Jie chenj@lemote.com
drivers/gpu/drm/radeon/radeon_device.c | 7 ++++--- 1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index b51e157..2c3429d 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -750,14 +750,15 @@ int radeon_device_init(struct radeon_device *rdev,
/* set DMA mask + need_dma32 flags. * PCIE - can handle 40-bits.
* IGP - can handle 40-bits (in theory)
* IGP - can handle 40-bits * AGP - generally dma32 is safest
* PCI - only dma32
* PCI - dma32 for legacy pci gart, 40 bits on newer asics */ rdev->need_dma32 = false; if (rdev->flags & RADEON_IS_AGP) rdev->need_dma32 = true;
if (rdev->flags & RADEON_IS_PCI)
if ((rdev->flags & RADEON_IS_PCI) &&
(rdev->family < CHIP_RS400)) rdev->need_dma32 = true; dma_bits = rdev->need_dma32 ? 32 : 40;
-- 1.7.1.1
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