Add the mailbox compatible for the MediaTek APU. The MT8192 and MT8195 SOC will use it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@mediatek.com Signed-off-by: Flora Fu flora.fu@mediatek.com
--- .../mailbox/mediatek,apu-mailbox.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,apu-mailbox.yaml
diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,apu-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,apu-mailbox.yaml new file mode 100644 index 000000000000..ffd0e1623955 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/mediatek,apu-mailbox.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2021 MediaTek Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/mediatek,apu-mailbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek AI Processing Unit mailbox controller bindings + +description: + The APU mailbox controller provides access from the + application processor to the MediaTek AI Processing Unit. + +maintainers: + - Pi-Cheng Chen pi-cheng.chen@mediatek.com + +properties: + compatible: + enum: + - mediatek,mtk-apu-mailbox + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#mbox-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + apu_mailbox: apu_mailbox@19000000 { + compatible = "mediatek,mtk-apu-mailbox"; + reg = <0x19000000 0x100>; + interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <1>; + };