Hi Philipp,
On 05/29/2015 02:30 AM, Philipp Zabel wrote:
Hi Eric,
Am Donnerstag, den 28.05.2015, 12:30 -0700 schrieb Eric Nelson:
Hi Philipp,
On 05/28/2015 03:58 AM, Philipp Zabel wrote:
Hi Gary,
Am Mittwoch, den 27.05.2015, 15:31 +0200 schrieb Gary Bisson:
According to the kerneldoc comment for drm_fb_helper_initial_config (which is used by imx-drm via drm_fbdev_cma_init), it should set up a single /dev/fb cloned over all connectors. This works here with LVDS and HDMI.
Does it require the two displays to have the exact same resolution? I'm wondering what is wrong with my setup but with a 1024x768 LVDS and a 1920x1080 HDMI display no image is shown on the HDMI (no signal). The CRTC settings show that both have the same origin (0,0) so I expected the LVDS to display a part of what the HDMI *should* display.
No, but it does require the HDMI and LVDS display to use different clock sources (unless LVDS serializer clock happens to be the same as the HDMI pixel clock).
I wonder what we should do about this for devices that have both LVDS and HDMI output and can only use PLL5 for both. Register a clock notifier that vetoes changes?
The LDB can be clocked from PLL2.
Here's a snippet of the clock tree from our 3.10.53 (Android) kernel running both HDMI at 720P and the Hannstar hsd070pww1 panel:
pll2_pfd0_352m 1 1 500210526What is the parent of gpu2d_core_sel? This looks like it would severely overclock the vivante 2d core.
PLL3.
Here's a full clock tree for a Nitrogen6x configured for 1280x800 LVDS and 720P HDMI.
The GPU 2d core is running at 480MHz and the 3d core at 528MHz, so they're both under the limits of 532 and 540.
Looking at the clock tree for 4.1, it appears that the gpu3d_core is being over-clocked at 594 MHz.
Regards,
Eric