Hi Marijn,
On 17-02-22, 10:27, Marijn Suijten wrote:
Vinod,
On 2022-02-10 16:04:23, Vinod Koul wrote:
When DSC is enabled, we need to configure DSI registers accordingly and configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and timing information and configure these registers.
Signed-off-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul vkoul@kernel.org
I supplied a rather extensive - yet merely scratching the surface - review of this patch in:
https://lore.kernel.org/linux-arm-msm/20211211000315.pavmcc7cc73ilb6l@SoMainline.org/
Sorry somehow I seem to have overlooked this one.
It seems none of those points have been addressed, bar creating a mesa MR to update dsi.xml with a subpar description of the registers (offsets only).
Mesa MR was planned as we get more closer to having reviews.
For every point that is intentionally ignored, please at least supply a justification of why you think this is the right thing to do.
Ofcourse, i will reply to these now and address as required.