From: suijingfeng suijingfeng@loongson.cn
This board is made by LEMOTE corporation, it has two name, one is LX-6901, another is A1901.
This board has only one VGA output which is connected to the DVO1 of the display controller.
+------+ +-----------------------------------+ | DDR4 | | +-------------------+ | +------+ | | PCIe Root complex | LS7A1000 | || MC0 | +--++---------++----+ | +----------+ HT 3.0 | || || | | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+ | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM | +----------+ | +--------+ +-+--+-+ +---------+ +------+ || MC1 +---------------|--|----------------+ +------+ | | | DDR4 | DVO0 is not get used | | DVO1 +-------+ +------+ <--------------------+ +-------->|ADV7125|---> VGA +-------+ The model property added can provided board specific information, mips kernel use it as machine name.
$ cat /proc/cpuinfo
system type : Generic Loongson64 System machine : LX-6901 <-------------------- notice here processor : 0 cpu model : ICT Loongson-3 V0.1 FPU V0.1 BogoMIPS : 3594.02 tlb_entries : 2112 isa : mips64r2 ASEs implemented : vz msa loongson-ext2 ...
Signed-off-by: suijingfeng suijingfeng@loongson.cn Signed-off-by: Sui Jingfeng 15330273260@189.cn --- arch/mips/boot/dts/loongson/lemote_a1901.dts | 92 ++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 arch/mips/boot/dts/loongson/lemote_a1901.dts
diff --git a/arch/mips/boot/dts/loongson/lemote_a1901.dts b/arch/mips/boot/dts/loongson/lemote_a1901.dts new file mode 100644 index 000000000000..f0443bc43af9 --- /dev/null +++ b/arch/mips/boot/dts/loongson/lemote_a1901.dts @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64g-package.dtsi" +#include "ls7a-pch.dtsi" + +/ { + model = "LX-6901"; + + vga-encoder { + compatible = "adi,adv7123", "dumb-vga-dac"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&dc_out_rgb1>; + }; + }; + + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_connector_in>; + }; + }; + }; + }; + + vga-connector { + compatible = "vga-connector"; + label = "vga"; + + ddc-i2c-bus = <&i2c7>; + + port { + vga_connector_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; +}; + +&package0 { + htvec: interrupt-controller@efdfb000080 { + compatible = "loongson,htvec-1.0"; + reg = <0xefd 0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <31 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&pch { + msi: msi-controller@2ff00000 { + compatible = "loongson,pch-msi-1.0"; + reg = <0 0x2ff00000 0 0x8>; + interrupt-controller; + msi-controller; + loongson,msi-base-vec = <64>; + loongson,msi-num-vecs = <192>; + interrupt-parent = <&htvec>; + }; +}; + +&lsdc { + ports { + port@0 { + status = "disabled"; + }; + + port@1 { + status = "ok"; + endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + }; +};