Enable and connect the second LVDS encoder to the second LVDS input of the THC63LVD1024 for dual-link LVDS operation. This requires changing the default settings of SW45 and SW47 to OFF and ON respectively.
Signed-off-by: Laurent Pinchart laurent.pinchart+renesas@ideasonboard.com --- .../arm64/boot/dts/renesas/r8a77995-draak.dts | 21 +++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index db2bed1751b8..6af0e891c1ec 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -77,11 +77,18 @@
port@0 { reg = <0>; - thc63lvd1024_in: endpoint { + thc63lvd1024_in0: endpoint { remote-endpoint = <&lvds0_out>; }; };
+ port@1 { + reg = <1>; + thc63lvd1024_in1: endpoint { + remote-endpoint = <&lvds1_out>; + }; + }; + port@2 { reg = <2>; thc63lvd1024_out: endpoint { @@ -349,17 +356,27 @@ ports { port@1 { lvds0_out: endpoint { - remote-endpoint = <&thc63lvd1024_in>; + remote-endpoint = <&thc63lvd1024_in0>; }; }; }; };
&lvds1 { + status = "okay"; + clocks = <&cpg CPG_MOD 727>, <&x12_clk>, <&extal_clk>; clock-names = "fck", "dclkin.0", "extal"; + + ports { + port@1 { + lvds1_out: endpoint { + remote-endpoint = <&thc63lvd1024_in1>; + }; + }; + }; };
&ohci0 {