Hi,
I gave the series a try (virtual CX and TP so far, will do on a real CX later): OOPS with a nullptr deref during probe. This diff which just moves some lines around fixes that and the LCD appears to work properly.
Once I verified the 24bit depth and clock speed config on HW as well, I can give you my Tested-by, or would you prefer that I resubmit your series with the fix below?
Thanks, Fabian
--- diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 587b4d148c18..bd84d7a5a0f4 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -133,10 +133,6 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, u32 cpl, tim2; int ret;
- if (connector->display_info.num_bus_formats == 1 && - connector->display_info.bus_formats[0] == MEDIA_BUS_FMT_Y8_1X8) - grayscale = true; - ret = clk_set_rate(priv->clk, mode->clock * 1000); if (ret) { dev_err(drm->dev, @@ -191,6 +187,10 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) tim2 |= TIM2_IPC;
+ if (connector->display_info.num_bus_formats == 1 && + connector->display_info.bus_formats[0] == MEDIA_BUS_FMT_Y8_1X8) + grayscale = true; + /* * The AC pin bias frequency is set to max count when using * grayscale so at least once in a while we will reverse