Re: [PATCH v7 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings

Hi Swapnil.

On Wed, Jul 22, 2020 at 09:40:38AM +0200, Swapnil Jakhade wrote:

From: Yuti Amonkar yamonkar@cadence.com

Document the bindings used for the Cadence MHDP DPI/DP bridge in yaml format.

Signed-off-by: Yuti Amonkar yamonkar@cadence.com Signed-off-by: Swapnil Jakhade sjakhade@cadence.com Reviewed-by: Rob Herring robh@kernel.org Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com

---

.../bindings/display/bridge/cdns,mhdp.yaml | 127 ++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml

diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml new file mode 100644 index 000000000000..cdf5760d4ec5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"

+title: Cadence MHDP bridge

+maintainers:

• • Swapnil Jakhade sjakhade@cadence.com
• • Yuti Amonkar yamonkar@cadence.com

+properties:

• compatible:
• enum:

•  - cdns,mhdp8546
  

•  - ti,j721e-mhdp8546
  

• reg:
• minItems: 1
• maxItems: 2
• items:

•  - description:
  

•      Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
  

•      The AUX and PMA registers are not part of this range, they are instead
  

•      included in the associated PHY.
  

•  - description:
  

•      Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
  

• reg-names:
• minItems: 1
• maxItems: 2
• items:

•  - const: mhdptx
  

•  - const: j721e-intg
  

• clocks:
• maxItems: 1
• description:

•  DP bridge clock, used by the IP to know how to translate a number of
  

•  clock cycles into a time (which is used to comply with DP standard timings
  

•  and delays).
  

• phys:
• description:

•  phandle to the DisplayPort PHY.
  

• ports:
• type: object
• description:

•  Ports as described in Documentation/devicetree/bindings/graph.txt.
  

• properties:

•  '#address-cells':
  

•    const: 1
  

•  '#size-cells':
  

•    const: 0
  

•  port@0:
  

•    type: object
  

•    description:
  

•      Input port representing the DP bridge input.
  

•  port@1:
  

•    type: object
  

•    description:
  

•      Output port representing the DP bridge output.
  

• required:

•  - port@0
  

•  - port@1
  

•  - '#address-cells'
  

•  - '#size-cells'
  

+allOf:

• • if:

•  properties:
  

•    compatible:
  

•      contains:
  

•        const: ti,j721e-mhdp8546
  

• then:

•  properties:
  

•    reg:
  

•      minItems: 2
  

•    reg-names:
  

•      minItems: 2
  

+required:

• • compatible
• • clocks
• • reg
• • reg-names
• • phys
• • ports

+additionalProperties: false

+examples:

• • |
• mhdp: dp-bridge@f0fb000000 {

•    compatible = "cdns,mhdp8546";
  

•    reg = <0xf0 0xfb000000 0x0 0x1000000>;
  

•    reg-names = "mhdptx";
  

•    clocks = <&mhdp_clock>;
  

•    phys = <&dp_phy>;
  

•    ports {
  

Please be consistent in indent. We do not aling below '{'. Keep using 4 spaces for indent for the full example.

Sam

•          #address-cells = <1>;
  

•          #size-cells = <0>;
  

•          port@0 {
  

•                 reg = <0>;
  

•                 dp_bridge_input: endpoint {
  

•                    remote-endpoint = <&xxx_dpi_output>;
  

•                 };
  

•          };
  

•          port@1 {
  

•                 reg = <1>;
  

•                 dp_bridge_output: endpoint {
  

•                    remote-endpoint = <&xxx_dp_connector_input>;
  

•                 };
  

•          };
  

•    };
  

• };

+...

2.26.1

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