Signed-off-by: mark yao yzq@rock-chips.com --- .../devicetree/bindings/video/rockchip-lcdc.txt | 33 ++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/video/rockchip-lcdc.txt
diff --git a/Documentation/devicetree/bindings/video/rockchip-lcdc.txt b/Documentation/devicetree/bindings/video/rockchip-lcdc.txt new file mode 100644 index 0000000..7fb2b73 --- /dev/null +++ b/Documentation/devicetree/bindings/video/rockchip-lcdc.txt @@ -0,0 +1,33 @@ +Device-Tree bindings for Rockchip SoC display controller (LCDC) + +LCDC (LCD Controller) is the Display Controller for the Rockchip +series of SoCs which transfers the image data from a video memory +buffer to an external LCD interface. + +Required properties: +- compatible: value should be one of the following + "rockchip,rk3066-lcdc"; + "rockchip,rk3188-lcdc"; + "rockchip,rk3288-lcdc"; + +- interrupts: should contain a list of all LCDC IP block interrupts in the + order: VSYNC, LCD_SYSTEM. The interrupt specifier + format depends on the interrupt controller used. + +- clocks: must include clock specifiers corresponding to entries in the + clock-names property. + +- clock-names: Must contain + aclk_lcdc: for ddr buffer transfer. + hclk_lcdc: for ahb bus to R/W the phy regs. + dclk_lcdc: pixel clock. + +Example: +SoC specific DT entry: + lcdc1: lcdc@ff940000 { + compatible = "rockchip,rk3288-lcdc"; + reg = <0xff940000 0x19c>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_LCDC1>, <&cru DCLK_LCDC1>, <&cru HCLK_LCDC1>; + clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc"; + };