[PATCH 1/4] drm/msm: gpu: Use drm_printer to consolidate the show/dump code

5 Jan 2018

Use drm_printer to abstract the show/dump debug code so we can
use the same code for both the kernel log and seq_file paths.
Maintaining the existing dump format mandates that we break the
single show function into two but thats a small price to pay for
removing a bunch of code and consolidating the path.
Signed-off-by: Jordan Crouse jcrouse@codeaurora.org
---
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   | 18 +++------
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   | 15 ++-----
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 18 +++------
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 70 +++++++++------------------------
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  2 +
 5 files changed, 34 insertions(+), 89 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 4baef27..29bb15b 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -39,7 +39,6 @@
extern bool hang_debug;
-static void a3xx_dump(struct msm_gpu *gpu);
 static bool a3xx_idle(struct msm_gpu *gpu);
static bool a3xx_me_init(struct msm_gpu *gpu)
@@ -300,18 +299,18 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
static void a3xx_recover(struct msm_gpu *gpu)
 {
+	struct drm_printer p = drm_info_printer(gpu->dev->dev);
    int i;
-	adreno_dump_info(gpu);
+	adreno_show_info(gpu, &p);
-	for (i = 0; i < 8; i++) {
-		printk("CP_SCRATCH_REG%d: %u\n", i,
+	for (i = 0; i < 8; i++)
+		drm_printf(&p, "CP_SCRATCH_REG%d: %u\n", i,
    		gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i));
-	}
/* dump registers before resetting gpu, if enabled: */
    if (hang_debug)
-		a3xx_dump(gpu);
+		adreno_show_regs(gpu, &p);
gpu_write(gpu, REG_A3XX_RBBM_SW_RESET_CMD, 1);
    gpu_read(gpu, REG_A3XX_RBBM_SW_RESET_CMD);
@@ -419,13 +418,6 @@ static void a3xx_show(struct msm_gpu *gpu, struct seq_file *m)
 }
 #endif
-/* would be nice to not have to duplicate the _show() stuff with printk(): */
-static void a3xx_dump(struct msm_gpu *gpu)
-{
-	printk("status:   %08x\n",
-			gpu_read(gpu, REG_A3XX_RBBM_STATUS));
-	adreno_dump(gpu);
-}
 /* Register offset defines for A3XX */
 static const unsigned int a3xx_register_offsets[REG_ADRENO_REGISTER_MAX] = {
    REG_ADRENO_DEFINE(REG_ADRENO_CP_RB_BASE, REG_AXXX_CP_RB_BASE),
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 8199a4b..d9742b1 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -30,7 +30,6 @@
     A4XX_INT0_UCHE_OOB_ACCESS)
extern bool hang_debug;
-static void a4xx_dump(struct msm_gpu *gpu);
 static bool a4xx_idle(struct msm_gpu *gpu);
/*
@@ -298,18 +297,19 @@ static int a4xx_hw_init(struct msm_gpu *gpu)
static void a4xx_recover(struct msm_gpu *gpu)
 {
+	struct drm_printer p = drm_info_printer(gpu->dev->dev);
    int i;
-	adreno_dump_info(gpu);
+	adreno_show_info(gpu, &p);
for (i = 0; i < 8; i++) {
-		printk("CP_SCRATCH_REG%d: %u\n", i,
+		drm_printf(&p, "CP_SCRATCH_REG%d: %u\n", i,
    		gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i));
    }
/* dump registers before resetting gpu, if enabled: */
    if (hang_debug)
-		a4xx_dump(gpu);
+		adreno_show_regs(gpu, &p);
gpu_write(gpu, REG_A4XX_RBBM_SW_RESET_CMD, 1);
    gpu_read(gpu, REG_A4XX_RBBM_SW_RESET_CMD);
@@ -475,13 +475,6 @@ static void a4xx_show(struct msm_gpu *gpu, struct seq_file *m)
    REG_ADRENO_DEFINE(REG_ADRENO_CP_RB_CNTL, REG_A4XX_CP_RB_CNTL),
 };
-static void a4xx_dump(struct msm_gpu *gpu)
-{
-	printk("status:   %08x\n",
-			gpu_read(gpu, REG_A4XX_RBBM_STATUS));
-	adreno_dump(gpu);
-}
-
 static int a4xx_pm_resume(struct msm_gpu *gpu) {
    struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
    int ret;
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index a1f4eee..deec597 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -22,7 +22,6 @@
 #include "a5xx_gpu.h"
extern bool hang_debug;
-static void a5xx_dump(struct msm_gpu *gpu);
#define GPU_PAS_ID 13
@@ -755,17 +754,17 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
static void a5xx_recover(struct msm_gpu *gpu)
 {
+	struct drm_printer p = drm_info_printer(gpu->dev->dev);
    int i;
-	adreno_dump_info(gpu);
+	adreno_show_info(gpu, &p);
-	for (i = 0; i < 8; i++) {
-		printk("CP_SCRATCH_REG%d: %u\n", i,
+	for (i = 0; i < 8; i++)
+		drm_printf(&p, "CP_SCRATCH_REG%d: %u\n", i,
    		gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(i)));
-	}
if (hang_debug)
-		a5xx_dump(gpu);
+		adreno_show_regs(gpu, &p);
gpu_write(gpu, REG_A5XX_RBBM_SW_RESET_CMD, 1);
    gpu_read(gpu, REG_A5XX_RBBM_SW_RESET_CMD);
@@ -1073,13 +1072,6 @@ static irqreturn_t a5xx_irq(struct msm_gpu *gpu)
    0xB9A0, 0xB9BF, ~0
 };
-static void a5xx_dump(struct msm_gpu *gpu)
-{
-	dev_info(gpu->dev->dev, "status:   %08x\n",
-		gpu_read(gpu, REG_A5XX_RBBM_STATUS));
-	adreno_dump(gpu);
-}
-
 static int a5xx_pm_resume(struct msm_gpu *gpu)
 {
    int ret;
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 2f0610f..60b3c99 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -362,13 +362,12 @@ bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
    return false;
 }
-#ifdef CONFIG_DEBUG_FS
-void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
+void adreno_show_info(struct msm_gpu *gpu, struct drm_printer *p)
 {
    struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
    int i;
-	seq_printf(m, "revision: %d (%d.%d.%d.%d)\n",
+	drm_printf(p, "revision: %d (%d.%d.%d.%d)\n",
    		adreno_gpu->info->revn, adreno_gpu->rev.core,
    		adreno_gpu->rev.major, adreno_gpu->rev.minor,
    		adreno_gpu->rev.patchid);
@@ -376,65 +375,22 @@ void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
    for (i = 0; i < gpu->nr_rings; i++) {
    	struct msm_ringbuffer *ring = gpu->rb[i];
-		seq_printf(m, "rb %d: fence:    %d/%d\n", i,
+		drm_printf(p, "rb %d: fence:    %d/%d\n", i,
    		ring->memptrs->fence, ring->seqno);
-		seq_printf(m, "      rptr:     %d\n",
+		drm_printf(p, "      rptr:     %d\n",
    		get_rptr(adreno_gpu, ring));
-		seq_printf(m, "rb wptr:  %d\n", get_wptr(ring));
-	}
-
-	/* dump these out in a form that can be parsed by demsm: */
-	seq_printf(m, "IO:region %s 00000000 00020000\n", gpu->name);
-	for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {
-		uint32_t start = adreno_gpu->registers[i];
-		uint32_t end   = adreno_gpu->registers[i+1];
-		uint32_t addr;
-
-		for (addr = start; addr <= end; addr++) {
-			uint32_t val = gpu_read(gpu, addr);
-			seq_printf(m, "IO:R %08x %08x\n", addr<<2, val);
-		}
+		drm_printf(p, "rb wptr:  %d\n", get_wptr(ring));
    }
 }
-#endif
-/* Dump common gpu status and scratch registers on any hang, to make
- * the hangcheck logs more useful.  The scratch registers seem always
- * safe to read when GPU has hung (unlike some other regs, depending
- * on how the GPU hung), and they are useful to match up to cmdstream
- * dumps when debugging hangs:
- */
-void adreno_dump_info(struct msm_gpu *gpu)
-{
-	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
-	int i;
-
-	printk("revision: %d (%d.%d.%d.%d)\n",
-			adreno_gpu->info->revn, adreno_gpu->rev.core,
-			adreno_gpu->rev.major, adreno_gpu->rev.minor,
-			adreno_gpu->rev.patchid);
-
-	for (i = 0; i < gpu->nr_rings; i++) {
-		struct msm_ringbuffer *ring = gpu->rb[i];
-
-		printk("rb %d: fence:    %d/%d\n", i,
-			ring->memptrs->fence,
-			ring->seqno);
-
-		printk("rptr:     %d\n", get_rptr(adreno_gpu, ring));
-		printk("rb wptr:  %d\n", get_wptr(ring));
-	}
-}
-
-/* would be nice to not have to duplicate the _show() stuff with printk(): */
-void adreno_dump(struct msm_gpu *gpu)
+void adreno_show_regs(struct msm_gpu *gpu, struct drm_printer *p)
 {
    struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
    int i;
/* dump these out in a form that can be parsed by demsm: */
-	printk("IO:region %s 00000000 00020000\n", gpu->name);
+	drm_printf(p, "IO:region %s 00000000 00020000\n", gpu->name);
    for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {
    	uint32_t start = adreno_gpu->registers[i];
    	uint32_t end   = adreno_gpu->registers[i+1];
@@ -442,11 +398,21 @@ void adreno_dump(struct msm_gpu *gpu)
for (addr = start; addr <= end; addr++) {
    		uint32_t val = gpu_read(gpu, addr);
-			printk("IO:R %08x %08x\n", addr<<2, val);
+			drm_printf(p, "IO:R %08x %08x\n", addr<<2, val);
    	}
    }
 }
+#ifdef CONFIG_DEBUG_FS
+void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
+{
+	struct drm_printer p = drm_seq_file_printer(m);
+
+	adreno_show_info(gpu, &p);
+	adreno_show_regs(gpu, &p);
+}
+#endif
+
 static uint32_t ring_freewords(struct msm_ringbuffer *ring)
 {
    struct adreno_gpu *adreno_gpu = to_adreno_gpu(ring->gpu);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 28e3de6..3443071 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -223,6 +223,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
    	int nr_rings);
 void adreno_gpu_cleanup(struct adreno_gpu *gpu);
+void adreno_show_info(struct msm_gpu *gpu, struct drm_printer *p);
+void adreno_show_regs(struct msm_gpu *gpu, struct drm_printer *p);
/* ringbuffer helpers (the parts that are adreno specific) */
-- 
1.9.1


    

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[PATCH 1/4] drm/msm: gpu: Use drm_printer to consolidate the show/dump code