чт, 2 янв. 2020 г., 09:42 Jernej Škrabec jernej.skrabec@siol.net:
Hi!
Dne sreda, 01. januar 2020 ob 21:47:50 CET je roman.stratiienko@globallogic.com napisal(a):
From: Roman Stratiienko roman.stratiienko@globallogic.com
According to DRM documentation the only difference between PRIMARY and OVERLAY plane is that each CRTC must have PRIMARY plane and OVERLAY are optional.
Allow PRIMARY plane to have dimension different from full-screen.
Fixes: 5bb5f5dafa1a ("drm/sun4i: Reorganize UI layer code in DE2") Signed-off-by: Roman Stratiienko roman.stratiienko@globallogic.com
This looks great now.
Reviewed-by: Jernej Skrabec jernej.skrabec@siol.net
What happened to other patches in the series? It would be nice to have a cover letter for such cases, where you can explain reasons for dropped patches.
Thanks and sorry for any mistakes in procedure, I'll try to follow the rules in the future.. Some of commits requires more time to test/deliver than others. So splitting it into smaller chunks helps to deliver them earlier.
Best regards, Jernej
v2:
- Split commit in 2 parts
- Add Fixes line to the commit message
v3:
- Address review comments of v2 + removed 3 local varibles
- Change 'Fixes' line
Since I've put more changes from my side, please review/sign again.
drivers/gpu/drm/sun4i/sun8i_mixer.c | 28 ++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 30 -------------------------- 2 files changed, 28 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 8b803eb903b8..658cf442c121 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -257,6 +257,33 @@ const struct de2_fmt_info *sun8i_mixer_format_info(u32 format) return NULL; }
+static void sun8i_mode_set(struct sunxi_engine *engine,
struct drm_display_mode *mode)+{
u32 size = SUN8I_MIXER_SIZE(mode->crtc_hdisplay, mode-crtc_vdisplay);
struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine);u32 bld_base = sun8i_blender_base(mixer);u32 val;DRM_DEBUG_DRIVER("Mode change, updating global size W: %u H: %u\n",mode->crtc_hdisplay, mode->crtc_vdisplay);regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_SIZE, size);regmap_write(mixer->engine.regs,SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size);if (mode->flags & DRM_MODE_FLAG_INTERLACE)val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED;elseval = 0;regmap_update_bits(mixer->engine.regs,SUN8I_MIXER_BLEND_OUTCTL(bld_base),SUN8I_MIXER_BLEND_OUTCTL_INTERLACED,val);DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n",val ? "on" : "off");+}
static void sun8i_mixer_commit(struct sunxi_engine *engine) { DRM_DEBUG_DRIVER("Committing changes\n"); @@ -310,6 +337,7 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, static const struct sunxi_engine_ops sun8i_engine_ops = { .commit = sun8i_mixer_commit, .layers_init = sun8i_layers_init,
.mode_set = sun8i_mode_set,};
static struct regmap_config sun8i_mixer_regmap_config = { diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 4343ea9f8cf8..f01ac55191f1 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -120,36 +120,6 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, insize = SUN8I_MIXER_SIZE(src_w, src_h); outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
if (plane->type == DRM_PLANE_TYPE_PRIMARY) {bool interlaced = false;u32 val;DRM_DEBUG_DRIVER("Primary layer, updating global sizeW: %u H: %u\n",
dst_w, dst_h);regmap_write(mixer->engine.regs,SUN8I_MIXER_GLOBAL_SIZE,outsize);regmap_write(mixer->engine.regs,SUN8I_MIXER_BLEND_OUTSIZE(bld_base),outsize);
if (state->crtc)interlaced = state->crtc->state-adjusted_mode.flags
& DRM_MODE_FLAG_INTERLACE;if (interlaced)val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED;elseval = 0;regmap_update_bits(mixer->engine.regs,SUN8I_MIXER_BLEND_OUTCTL(bld_base),
SUN8I_MIXER_BLEND_OUTCTL_INTERLACED,
val);DRM_DEBUG_DRIVER("Switching display mixer interlacedmode %s\n",
interlaced ? "on" : "off");}/* Set height and width */ DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n", state->src.x1 >> 16, state->src.y1 >> 16);