Implement ->get_state() to provide support for initial state retrieval.
Signed-off-by: Boris Brezillon boris.brezillon@free-electrons.com --- drivers/pwm/pwm-sti.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)
diff --git a/drivers/pwm/pwm-sti.c b/drivers/pwm/pwm-sti.c index 92abbd5..0fbca94 100644 --- a/drivers/pwm/pwm-sti.c +++ b/drivers/pwm/pwm-sti.c @@ -238,6 +238,46 @@ static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) mutex_unlock(&pc->sti_pwm_lock); }
+static void sti_pwm_get_state(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_state *pstate) +{ + struct sti_pwm_chip *pc = to_sti_pwmchip(chip); + unsigned int regval, prescaler; + u64 timens; + int ret; + + /* The clock has to be enabled to access PWM registers */ + ret = clk_enable(pc->clk); + if (ret) { + dev_err(chip->dev, "Failed to enable PWM clk"); + return; + } + + regmap_field_read(pc->prescale_high, ®val); + prescaler = regval << 4; + regmap_field_read(pc->prescale_low, ®val); + prescaler |= regval; + + timens = (u64)(prescaler + 1) * NSEC_PER_SEC * + (pc->cdata->max_pwm_cnt + 1); + do_div(timens, pc->clk_rate); + + pstate->period = timens; + + regmap_read(pc->regmap, STI_DS_REG(pwm->hwpwm), ®val); + timens = (u64)(regval + 1) * pstate->period; + do_div(timens, pc->cdata->max_pwm_cnt + 1); + pstate->duty_cycle = timens; + + regmap_field_read(pc->pwm_en, ®val); + pstate->enabled = regval; + + pstate->polarity = PWM_POLARITY_NORMAL; + + clk_disable(pc->clk); +} + static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) { struct sti_pwm_chip *pc = to_sti_pwmchip(chip); @@ -249,6 +289,7 @@ static const struct pwm_ops sti_pwm_ops = { .config = sti_pwm_config, .enable = sti_pwm_enable, .disable = sti_pwm_disable, + .get_state = sti_pwm_get_state, .free = sti_pwm_free, .owner = THIS_MODULE, };