It's used for delaying vsync in interlaced mode.
Signed-off-by: Eric Anholt eric@anholt.net --- drivers/gpu/drm/vc4/vc4_crtc.c | 2 +- drivers/gpu/drm/vc4/vc4_regs.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index bb74cb9..5daa824 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -88,7 +88,7 @@ static const struct { } crtc_regs[] = { CRTC_REG(PV_CONTROL), CRTC_REG(PV_V_CONTROL), - CRTC_REG(PV_VSYNCD), + CRTC_REG(PV_VSYNCD_EVEN), CRTC_REG(PV_HORZA), CRTC_REG(PV_HORZB), CRTC_REG(PV_VERTA), diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index 31042a4..58d4cb3 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -187,7 +187,7 @@ # define PV_VCONTROL_CONTINUOUS BIT(1) # define PV_VCONTROL_VIDEN BIT(0)
-#define PV_VSYNCD 0x08 +#define PV_VSYNCD_EVEN 0x08
#define PV_HORZA 0x0c # define PV_HORZA_HBP_MASK VC4_MASK(31, 16)