Hi Tomi,
Thank you for the patch.
On Tue, Nov 24, 2020 at 02:45:23PM +0200, Tomi Valkeinen wrote:
Simplify and optimize dsi_vc_enable_hs() so that it can be called without checking the current HS/LP mode. Make dsi_vc_enable_hs() return if the VC is already in the correct mode.
Signed-off-by: Tomi Valkeinen tomi.valkeinen@ti.com
drivers/gpu/drm/omapdrm/dss/dsi.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 4ac82166edc3..c3f13226ac26 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -341,7 +341,6 @@ struct dsi_data { int irq;
bool is_enabled;
bool in_lp_mode;
struct clk *dss_clk; struct regmap *syscon;
@@ -2441,6 +2440,9 @@ static void dsi_vc_enable_hs(struct omap_dss_device *dssdev, int vc,
DSSDBG("dsi_vc_enable_hs(%d, %d)\n", vc, enable);
- if (REG_GET(dsi, DSI_VC_CTRL(vc), 9, 9) == enable)
return;
I tend to prefer cached state instead of reading it back from the hardware, as it's (marginally) more efficient. In either case,
Reviewed-by: Laurent Pinchart laurent.pinchart@ideasonboard.com
WARN_ON(!dsi_bus_is_locked(dsi));
dsi_vc_enable(dsi, vc, 0); @@ -2456,8 +2458,6 @@ static void dsi_vc_enable_hs(struct omap_dss_device *dssdev, int vc, /* start the DDR clock by sending a NULL packet */ if (dsi->vm_timings.ddr_clk_always_on && enable) dsi_vc_send_null(dsi, vc, dsi->dsidev->channel);
- dsi->in_lp_mode = !enable;
}
static void dsi_vc_flush_long_data(struct dsi_data *dsi, int vc) @@ -4886,9 +4886,7 @@ static ssize_t _omap_dsi_host_transfer(struct dsi_data *dsi, int vc, struct omap_dss_device *dssdev = &dsi->output; int r;
- if (!!(msg->flags & MIPI_DSI_MSG_USE_LPM) != dsi->in_lp_mode)
dsi_vc_enable_hs(dssdev, vc,!(msg->flags & MIPI_DSI_MSG_USE_LPM));
dsi_vc_enable_hs(dssdev, vc, !(msg->flags & MIPI_DSI_MSG_USE_LPM));
switch (msg->type) { case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM: