On Thu, Aug 23, 2018 at 02:48:29PM +0530, Sharat Masetty wrote:
Add a simple function to read 64 registers in the GMU domain
Signed-off-by: Sharat Masetty smasetty@codeaurora.org
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h index a08ee8f..f9e4dfe 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h @@ -106,6 +106,19 @@ static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or) gmu_write(gmu, reg, val | or); }
+static inline u64 gmu_read64(struct a6xx_gmu *gmu, u32 lo, u32 hi) +{
- u64 val;
- /*
* Implementation similar to gpu_read64()*/
I'm not sure this comment is really needed, and it certainly could just be one line if it is.
- val = (u64) msm_readl(gmu->mmio + (lo << 2));
- val |= ((u64) msm_readl(gmu->mmio + (hi << 2)) << 32);
- return val;
+}
#define gmu_poll_timeout(gmu, addr, val, cond, interval, timeout) \ readl_poll_timeout((gmu)->mmio + ((addr) << 2), val, cond, \ interval, timeout) -- 1.9.1