https://bugs.freedesktop.org/show_bug.cgi?id=109303
Lionel Landwerlin lionel.g.landwerlin@linux.intel.com changed:
What |Removed |Added ---------------------------------------------------------------------------- Status|NEW |NEEDINFO
--- Comment #2 from Lionel Landwerlin lionel.g.landwerlin@linux.intel.com --- (In reply to Martin Peres from comment #0)
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_5388/shard-iclb2/ igt@i915_query@query-topology-known-pci-ids.html
Test requirement: IS_HASWELL(devid) || IS_BROADWELL(devid) || IS_SKYLAKE(devid) || IS_KABYLAKE(devid) || IS_COFFEELAKE(devid) Subtest query-topology-known-pci-ids: SKIP (0.000s)
I doubt that this would only be supported on these platforms and not on CNL and ICL.
It does only support haswell/gen8/gen9 because that's the only place where based off the GT we can deduct the number of slices/subslices and do some actual checks on the values returned by i915. On gen10+ fusing is a lot more fuzzy.
One way to extend coverage would be to beef up lib/intel_device_info.c to contain information about the topology of the device.
Thoughts welcome.