From: Thierry Reding treding@nvidia.com
Tegra186 and later are different than earlier generations in that they use an ARM SMMU rather than the Tegra SMMU. The ARM SMMU driver behaves slightly differently in that the geometry for IOMMU domains is set only after a device was attached to it. This is to make sure that the SMMU instance that the domain belongs to is known, because each instance can have a different input address space (i.e. geometry).
Work around this by moving all IOVA allocations to a point where the geometry of the domain is properly initialized.
This supersedes the following patch:
https://patchwork.kernel.org/patch/10775579/
Thierry
Thierry Reding (5): drm/tegra: Store parent pointer in Tegra DRM clients drm/tegra: vic: Load firmware on demand drm/tegra: Setup shared IOMMU domain after initialization drm/tegra: Restrict IOVA space to DMA mask gpu: host1x: Supports 40-bit addressing on Tegra186
drivers/gpu/drm/tegra/drm.c | 57 +++++++++++++++++++++---------------- drivers/gpu/drm/tegra/drm.h | 1 + drivers/gpu/drm/tegra/vic.c | 17 ++++++----- drivers/gpu/host1x/dev.c | 2 +- 4 files changed, 44 insertions(+), 33 deletions(-)