Re: [RFC PATCH v2 2/3] arm64: dts: imx8mm: Add MIPI DSI pipeline

On 11/11/21 11:14 AM, Jagan Teki wrote:

[...]

• 	dsi: dsi@32e10000 {
  

• 		compatible = "fsl,imx8mm-mipi-dsim";
  

• 		reg = <0x32e10000 0x400>;
  

• 		clocks = <&clk IMX8MM_CLK_DSI_CORE>,
  

• 			 <&clk IMX8MM_CLK_DSI_PHY_REF>;
  

• 		clock-names = "bus_clk", "sclk_mipi";
  

• 		assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>,
  

• 				  <&clk IMX8MM_VIDEO_PLL1_OUT>,
  

• 				  <&clk IMX8MM_CLK_DSI_PHY_REF>;
  

• 		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
  

• 					 <&clk IMX8MM_VIDEO_PLL1_BYPASS>,
  

• 					 <&clk IMX8MM_VIDEO_PLL1_OUT>;
  

• 		assigned-clock-rates = <266000000>, <594000000>, <27000000>;
  

• 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
  

• 		phys = <&mipi_phy 0>;
  

• 		phy-names = "dsim";
  

• 		power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_MIPI_DSI>;
  

• 		samsung,burst-clock-frequency = <891000000>;
  

• 		samsung,esc-clock-frequency = <54000000>;
  

• 		samsung,pll-clock-frequency = <27000000>;
  

• 		status = "disabled";
  

This 27 MHz is really IMX8MM_CLK_DSI_PHY_REF and samsung,burst-clock-frequency is really the DSI link clock which is panel/bridge specific ... but, why do we need to specify such policy in DT rather than have the panel/bridge drivers negotiate the best clock settings with DSIM bridge driver ? This should be something which should be implemented in the DRM subsystem, not hard-coded in DT. These ad-hoc samsung,*-clock-frequency properties shouldn't even be needed then.

Also, are the DSIM bindings stable now ?