Hi Dave,
The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c:
Linux 5.0-rc1 (2019-01-06 17:08:20 -0800)
are available in the Git repository at:
git://anongit.freedesktop.org/tegra/linux tags/drm/tegra/for-5.1-rc1
for you to fetch changes up to 79930bafe2802c3a67a70ad4904032d9154bf3fa:
gpu: host1x: Continue CDMA execution starting with a next job (2019-02-07 18:34:25 +0100)
Thanks, Thierry
---------------------------------------------------------------- drm/tegra: Changes for v5.1-rc1
This set of changes starts of with some refactoring of the CEC support to make it reusable on Tegra210 and later. Following are a couple of fixes for HDMI audio support (via HDA).
The bulk here is a set of preparatory patches working towards enabling Tegra186 support for host1x and VIC. Additional patches will be needed to fully enable this, but they're not quite ready yet.
To round things off, this also adds support for configuring the SOR crossbar using device tree, and fixes a couple of job-related issues in the host1x code.
---------------------------------------------------------------- Alban Bedel (1): drm/tegra: hdmi: Fix audio to work with any pixel clock rate
Arnd Bergmann (1): gpu: host1x: Use completion instead of semaphore
Dmitry Osipenko (3): gpu: host1x: Cancel only job that actually got stuck gpu: host1x: Don't complete a completed job gpu: host1x: Continue CDMA execution starting with a next job
Thierry Reding (21): drm/tegra: Refactor CEC support drm/tegra: sor: Parse more data from HDA format drm/tegra: hda: Extract HDA format parsing code drm/tegra: hdmi: Reuse common HDA format parser gpu: host1x: Represent host1x bus devices in debugfs gpu: host1x: Set up stream ID table gpu: host1x: Program the channel stream ID gpu: host1x: Introduce support for wide opcodes gpu: host1x: Support 40-bit addressing gpu: host1x: Restrict IOVA space to DMA mask gpu: host1x: Support 40-bit addressing on Tegra186 gpu: host1x: Use correct semantics for HOST1X_CHANNEL_DMAEND gpu: host1x: Optimize CDMA push buffer memory usage drm/tegra: Store parent pointer in Tegra DRM clients drm/tegra: vic: Load firmware on demand drm/tegra: Setup shared IOMMU domain after initialization drm/tegra: Restrict IOVA space to DMA mask drm/tegra: vic: Do not clear driver data drm/tegra: vic: Support stream ID register programming dt-bindings: display: tegra: Support SOR crossbar configuration drm/tegra: sor: Support device tree crossbar configuration
.../display/tegra/nvidia,tegra20-host1x.txt | 3 + drivers/gpu/drm/tegra/Makefile | 1 + drivers/gpu/drm/tegra/drm.c | 57 +++--- drivers/gpu/drm/tegra/drm.h | 3 +- drivers/gpu/drm/tegra/hda.c | 63 ++++++ drivers/gpu/drm/tegra/hda.h | 20 ++ drivers/gpu/drm/tegra/hdmi.c | 217 ++++++--------------- drivers/gpu/drm/tegra/output.c | 11 +- drivers/gpu/drm/tegra/sor.c | 64 +++--- drivers/gpu/drm/tegra/vic.c | 75 +++++-- drivers/gpu/drm/tegra/vic.h | 9 + drivers/gpu/host1x/bus.c | 35 ++++ drivers/gpu/host1x/cdma.c | 189 +++++++++++++----- drivers/gpu/host1x/cdma.h | 8 +- drivers/gpu/host1x/dev.c | 49 ++++- drivers/gpu/host1x/dev.h | 8 + drivers/gpu/host1x/hw/cdma_hw.c | 46 +++-- drivers/gpu/host1x/hw/channel_hw.c | 43 +++- drivers/gpu/host1x/hw/host1x06_hardware.h | 6 + drivers/gpu/host1x/hw/host1x07_hardware.h | 6 + drivers/gpu/host1x/hw/hw_host1x06_channel.h | 11 ++ drivers/gpu/host1x/hw/hw_host1x07_channel.h | 11 ++ include/trace/events/host1x.h | 26 +++ 23 files changed, 650 insertions(+), 311 deletions(-) create mode 100644 drivers/gpu/drm/tegra/hda.c create mode 100644 drivers/gpu/drm/tegra/hda.h create mode 100644 drivers/gpu/host1x/hw/hw_host1x06_channel.h create mode 100644 drivers/gpu/host1x/hw/hw_host1x07_channel.h