The imx6sl soc has gpu_2d and gpu_vg, no 3d support:
etnaviv-gpu 2200000.gpu: model: GC320, revision: 5007 etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215
The IP blocks seem to be already supported.
Signed-off-by: Leonard Crestez leonard.crestez@nxp.com Reviewed-by: Lucas Stach l.stach@pengutronix.de
--- arch/arm/boot/dts/imx6sl.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
Changes since v1: * Move nodes to the end of the file, sorting by address.
Link to v1: https://lists.freedesktop.org/archives/dri-devel/2018-July/183273.html
Tested by using yocto fsl community bsp built in "mainline" mode. This patch makes x11 start up and turning on drm.debug shows that the etnaviv driver is being used.
Patch is against shawguo/imx/dt, it depends on newly accepted commit 13211eec7b0e ("ARM: dts: imx6sl: Convert gpc to new bindings")
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index a6bc21433839..84413725b722 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -946,7 +946,27 @@ compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux"; reg = <0x021d8000 0x4000>; status = "disabled"; }; }; + + gpu_2d: gpu@2200000 { + compatible = "vivante,gc"; + reg = <0x02200000 0x4000>; + interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6SL_CLK_MMDC_ROOT>, + <&clks IMX6SL_CLK_GPU2D_OVG>; + clock-names = "bus", "core"; + power-domains = <&pd_pu>; + }; + + gpu_vg: gpu@2204000 { + compatible = "vivante,gc"; + reg = <0x02204000 0x4000>; + interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6SL_CLK_MMDC_ROOT>, + <&clks IMX6SL_CLK_GPU2D_OVG>; + clock-names = "bus", "core"; + power-domains = <&pd_pu>; + }; }; };