On Fri, Aug 9, 2019 at 6:24 PM Guido Günther agx@sigxcpu.org wrote:
This adds all the gpr registers and the define needed for selecting the input source in the imx-nwl drm bridge.
Signed-off-by: Guido Günther agx@sigxcpu.org
+#define IOMUXC_GPR0 0x00 +#define IOMUXC_GPR1 0x04 +#define IOMUXC_GPR2 0x08 +#define IOMUXC_GPR3 0x0c +#define IOMUXC_GPR4 0x10 +#define IOMUXC_GPR5 0x14 +#define IOMUXC_GPR6 0x18 +#define IOMUXC_GPR7 0x1c
(more of the same)
huh?
+/* i.MX8Mq iomux gpr register field defines */ +#define IMX8MQ_GPR13_MIPI_MUX_SEL BIT(2)
I think this define should probably be local to the pinctrl driver, to ensure that no other drivers fiddle with the registers manually.
Arnd