On Fri, Dec 22, 2017 at 8:22 PM, Icenowy Zheng icenowy@aosc.io wrote:
The H3/H5 SoCs have a HDMI output and a TV Composite output.
Add simplefb nodes for these outputs.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index fcb909658cf0..31478c03790d 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -53,6 +53,35 @@ #address-cells = <1>; #size-cells = <1>;
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer-hdmi {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "mixer0-lcd0-hdmi";
clocks = <&display_clocks CLK_BUS_MIXER0>,
<&ccu CLK_BUS_TCON0>, <&ccu CLK_BUS_HDMI>,
Are the bus clocks necessary? It's not like simplefb is going to access any of the control registers.
<&display_clocks CLK_MIXER0>,
<&ccu CLK_TCON0>, <&ccu CLK_HDMI>,
<&ccu CLK_HDMI_DDC>;
Is the DDC clock necessary? There's no usage of DDC with simplefb.
ChenYu
status = "disabled";
};
framebuffer-tve {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "mixer1-lcd1-tve";
clocks = <&display_clocks CLK_BUS_MIXER1>,
<&ccu CLK_BUS_TCON1>, <&ccu CLK_BUS_TVE>,
<&display_clocks CLK_MIXER1>,
<&ccu CLK_TVE>;
status = "disabled";
};
};
clocks { #address-cells = <1>; #size-cells = <1>;
-- 2.14.2