Hi,
On Mon, Feb 10, 2020 at 09:56:33PM +0200, Andrey Lebedev wrote:
A20 SoC (found in Cubieboard 2 among others) requires different LVDS set up procedure than A33. Timing controller (tcon) driver only implements sun6i-style procedure, that doesn't work on A20 (sun7i).
You're missing your Signed-off-by here.
The support for such procedure is ported from u-boot and follows u-boot naming convention: SUN6I* for sun6i-style procedure, and SUN4I for other (which happens to be compatible with A20).
A commit log is mostly about why you're doing a change, this part can be left out.
drivers/gpu/drm/sun4i/sun4i_tcon.c | 91 ++++++++++++++++++++---------- drivers/gpu/drm/sun4i/sun4i_tcon.h | 12 ++++ 2 files changed, 73 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index c81cdce6ed55..78896e907ca9 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -114,46 +114,74 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, } }
+static void sun4i_tcon_lvds_sun6i_enable(struct sun4i_tcon *tcon,
const struct drm_encoder *encoder) {
This doesn't match the kernel coding style, make sure to run checkpatch.
Also, using something like sun6i_tcon_setup_lvds_phy would be more fit to what this function is doing.
- u8 val;
- regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
SUN6I_TCON0_LVDS_ANA0_C(2) |SUN6I_TCON0_LVDS_ANA0_V(3) |SUN6I_TCON0_LVDS_ANA0_PD(2) |SUN6I_TCON0_LVDS_ANA0_EN_LDO);- udelay(2);
- regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
SUN6I_TCON0_LVDS_ANA0_EN_MB,SUN6I_TCON0_LVDS_ANA0_EN_MB);- udelay(2);
- regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
SUN6I_TCON0_LVDS_ANA0_EN_DRVC,SUN6I_TCON0_LVDS_ANA0_EN_DRVC);- if (sun4i_tcon_get_pixel_depth(encoder) == 18)
val = 7;- else
val = 0xf;- regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
SUN6I_TCON0_LVDS_ANA0_EN_DRVD(0xf),SUN6I_TCON0_LVDS_ANA0_EN_DRVD(val));+}
+static void sun4i_tcon_lvds_sun4i_enable(struct sun4i_tcon *tcon) {
And sun4i_tcon_setup_lvds_phy.
- regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,
SUN4I_TCON0_LVDS_ANA0_CK_EN |SUN4I_TCON0_LVDS_ANA0_REG_V |SUN4I_TCON0_LVDS_ANA0_REG_C |SUN4I_TCON0_LVDS_ANA0_EN_MB |SUN4I_TCON0_LVDS_ANA0_PD |SUN4I_TCON0_LVDS_ANA0_DCHS);- udelay(2); /* delay at least 1200 ns */
- regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA1_REG,
SUN4I_TCON0_LVDS_ANA1_INIT,SUN4I_TCON0_LVDS_ANA1_INIT);- udelay(1); /* delay at least 1200 ns */
The delay and your comment don't match.
- regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA1_REG,
SUN4I_TCON0_LVDS_ANA1_UPDATE,SUN4I_TCON0_LVDS_ANA1_UPDATE);
You refer to U-Boot in your commit log, but the sequence is not quite the same, why did you change it?
+}
static void sun4i_tcon_lvds_set_status(struct sun4i_tcon *tcon, const struct drm_encoder *encoder, bool enabled) { if (enabled) {
u8 val;
// Enable LVDS interface
There's no need for that comment, it's simple enough :)
regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, SUN4I_TCON0_LVDS_IF_EN, SUN4I_TCON0_LVDS_IF_EN);
/** As their name suggest, these values only apply to the A31* and later SoCs. We'll have to rework this when merging* support for the older SoCs.*/regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,SUN6I_TCON0_LVDS_ANA0_C(2) |SUN6I_TCON0_LVDS_ANA0_V(3) |SUN6I_TCON0_LVDS_ANA0_PD(2) |SUN6I_TCON0_LVDS_ANA0_EN_LDO);udelay(2);regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,SUN6I_TCON0_LVDS_ANA0_EN_MB,SUN6I_TCON0_LVDS_ANA0_EN_MB);udelay(2);regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,SUN6I_TCON0_LVDS_ANA0_EN_DRVC,SUN6I_TCON0_LVDS_ANA0_EN_DRVC);if (sun4i_tcon_get_pixel_depth(encoder) == 18)val = 7;elseval = 0xf;
// Perform SoC-specific setup procedure
Ditto.
if (tcon->quirks->sun6i_lvds_init) {sun4i_tcon_lvds_sun6i_enable(tcon, encoder);}else {sun4i_tcon_lvds_sun4i_enable(tcon);}
regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG,SUN6I_TCON0_LVDS_ANA0_EN_DRVD(0xf),SUN6I_TCON0_LVDS_ANA0_EN_DRVD(val));@@ -1454,6 +1482,7 @@ static const struct sun4i_tcon_quirks sun6i_a31s_quirks = { };
static const struct sun4i_tcon_quirks sun7i_a20_quirks = {
- .supports_lvds = true, .has_channel_0 = true, .has_channel_1 = true, .dclk_min_div = 4,
@@ -1464,11 +1493,13 @@ static const struct sun4i_tcon_quirks sun7i_a20_quirks = { static const struct sun4i_tcon_quirks sun8i_a33_quirks = { .has_channel_0 = true, .has_lvds_alt = true,
- .sun6i_lvds_init = true,
Using a function pointer here (like we're doing with set_mux) would be more future proof.
.dclk_min_div = 1, };
static const struct sun4i_tcon_quirks sun8i_a83t_lcd_quirks = { .supports_lvds = true,
- .sun6i_lvds_init = true, .has_channel_0 = true, .dclk_min_div = 1,
}; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index a62ec826ae71..973901c1bee5 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -193,6 +193,13 @@ #define SUN4I_TCON_MUX_CTRL_REG 0x200
#define SUN4I_TCON0_LVDS_ANA0_REG 0x220 +#define SUN4I_TCON0_LVDS_ANA0_DCHS BIT(16) +#define SUN4I_TCON0_LVDS_ANA0_PD BIT(20) | BIT(21) +#define SUN4I_TCON0_LVDS_ANA0_EN_MB BIT(22) +#define SUN4I_TCON0_LVDS_ANA0_REG_C BIT(24) | BIT(25) +#define SUN4I_TCON0_LVDS_ANA0_REG_V BIT(26) | BIT(27) +#define SUN4I_TCON0_LVDS_ANA0_CK_EN BIT(29) | BIT(28)
#define SUN6I_TCON0_LVDS_ANA0_EN_MB BIT(31) #define SUN6I_TCON0_LVDS_ANA0_EN_LDO BIT(30) #define SUN6I_TCON0_LVDS_ANA0_EN_DRVC BIT(24) @@ -201,6 +208,10 @@ #define SUN6I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8) #define SUN6I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4)
+#define SUN4I_TCON0_LVDS_ANA1_REG 0x224 +#define SUN4I_TCON0_LVDS_ANA1_INIT (0x1f << 26 | 0x1f << 10) +#define SUN4I_TCON0_LVDS_ANA1_UPDATE (0x1f << 16 | 0x1f << 00)
Having proper defines for those fields would be great too.
Side question, this will need some DT changes too, right?
Maxime