From: Arnd Bergmann arnd@arndb.de
The open-coded 64-bit division causes a link error on 32-bit machines:
ERROR: modpost: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: modpost: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
Use the div_s64() to perform the division here. One of them was an unsigned division originally, but it looks like signed division was intended, so use that to consistently allow a negative delay.
Fixes: ea7154d8d9fb ("drm/amd/display: Update dcn30_apply_idle_power_optimizations() code") Signed-off-by: Arnd Bergmann arnd@arndb.de --- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c index dff83c6a142a..a133e399e76d 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c @@ -772,8 +772,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable) cursor_cache_enable ? &cursor_attr : NULL)) { unsigned int v_total = stream->adjust.v_total_max ? stream->adjust.v_total_max : stream->timing.v_total; - unsigned int refresh_hz = (unsigned long long) stream->timing.pix_clk_100hz * - 100LL / (v_total * stream->timing.h_total); + unsigned int refresh_hz = div_s64((unsigned long long) stream->timing.pix_clk_100hz * + 100LL, v_total * stream->timing.h_total);
/* * one frame time in microsec: @@ -800,8 +800,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable) unsigned int denom = refresh_hz * 6528; unsigned int stutter_period = dc->current_state->perf_params.stutter_period_us;
- tmr_delay = (((1000000LL + 2 * stutter_period * refresh_hz) * - (100LL + dc->debug.mall_additional_timer_percent) + denom - 1) / + tmr_delay = div_s64(((1000000LL + 2 * stutter_period * refresh_hz) * + (100LL + dc->debug.mall_additional_timer_percent) + denom - 1), denom) - 64LL;
/* scale should be increased until it fits into 6 bits */ @@ -815,8 +815,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable) }
denom *= 2; - tmr_delay = (((1000000LL + 2 * stutter_period * refresh_hz) * - (100LL + dc->debug.mall_additional_timer_percent) + denom - 1) / + tmr_delay = div_s64(((1000000LL + 2 * stutter_period * refresh_hz) * + (100LL + dc->debug.mall_additional_timer_percent) + denom - 1), denom) - 64LL; }