On Sun, 2021-08-08 at 19:58 +0200, Thomas Zimmermann wrote:
Am 08.08.21 um 15:45 schrieb Paul Cercueil:
The priv->ipu_plane would get a different value further down the code, without the first assigned value being read first; so the first assignation can be dropped.
Signed-off-by: Paul Cercueil paul@crapouillou.net
Acked-by: Thomas Zimmermann tzimmermann@suse.de
I think this is at best an incomplete description.
How is it known that this priv->ipu_plane assignment isn't necessary for any path of any failure path after this assignment and before the new assignment?
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
[]
@@ -984,9 +984,6 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) priv->dma_hwdescs->hwdesc_pal.cmd = JZ_LCD_CMD_ENABLE_PAL | (sizeof(priv->dma_hwdescs->palette) / 4);
- if (soc_info->has_osd)
priv->ipu_plane = drm_plane_from_index(drm, 0);primary = priv->soc_info->has_osd ? &priv->f1 : &priv->f0;
drm_plane_helper_add(primary, &ingenic_drm_plane_helper_funcs);