This patch adds support for Synopsys DesignWare MIPI DSI host controller which is embedded in the i.MX6q/sdl SoCs.
Signed-off-by: Liu Ying Ying.Liu@freescale.com --- v8->v9: * Rebase onto the imx-drm/next branch of Philipp Zabel's open git repository. * Add driver copyright for 2015.
v7->v8: * None.
v6->v7: * None.
v5->v6: * Make the checkpatch.pl script be happier.
v4->v5: * None.
v3->v4: * Move the relevant dt-bindings to a separate patch to address Stefan Wahren's comment.
v2->v3: * To address Andy Yan's comments, move the common Synopsys DesignWare MIPI DSI host controller logic into it's drm/bridge driver and leave the i.MX specific logic only.
v1->v2: * Address almost all comments from Thierry Reding and Russell. * Update the DT documentation to remove the display-timings node in the panel node. * Update the DT documentation to state that the nodes which represent the possible DRM CRTCs the controller may connect with should be placed in the node "ports". * Remove the flag 'enabled' from the struct imx_mipi_dsi. * Move the format_to_bpp() function in v1 to the common DRM MIPI DSI driver. * Improve the way we wait for check status for DPHY and command packet transfer. * Improve the DPMS support for the encoder. * Split the functions of ->host_attach() and ->mode_valid() clearly as suggested by Thierry Reding. * Improve the logics in imx_mipi_dsi_dcs_long_write(). * Enable/disable the pllref_clk and pllref_gate_clk at the component binding/unbinding stages to help remove the flag 'enabled'. * Update the module license to be "GPL". * Other minor changes, such as coding style issues and macro naming issues.
drivers/gpu/drm/imx/Kconfig | 7 ++ drivers/gpu/drm/imx/Makefile | 1 + drivers/gpu/drm/imx/dw_mipi_dsi-imx.c | 230 ++++++++++++++++++++++++++++++++++ 3 files changed, 238 insertions(+) create mode 100644 drivers/gpu/drm/imx/dw_mipi_dsi-imx.c
diff --git a/drivers/gpu/drm/imx/Kconfig b/drivers/gpu/drm/imx/Kconfig index 33cdddf..7faeb49 100644 --- a/drivers/gpu/drm/imx/Kconfig +++ b/drivers/gpu/drm/imx/Kconfig @@ -53,3 +53,10 @@ config DRM_IMX_HDMI depends on DRM_IMX help Choose this if you want to use HDMI on i.MX6. + +config DRM_IMX_MIPI_DSI + tristate "Freescale i.MX DRM MIPI DSI" + select DRM_DW_MIPI_DSI + depends on DRM_IMX + help + Choose this if you want to use MIPI DSI on i.MX6. diff --git a/drivers/gpu/drm/imx/Makefile b/drivers/gpu/drm/imx/Makefile index f3ecd89..93919b4 100644 --- a/drivers/gpu/drm/imx/Makefile +++ b/drivers/gpu/drm/imx/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_DRM_IMX_LDB) += imx-ldb.o imx-ipuv3-crtc-objs := ipuv3-crtc.o ipuv3-plane.o obj-$(CONFIG_DRM_IMX_IPUV3) += imx-ipuv3-crtc.o obj-$(CONFIG_DRM_IMX_HDMI) += dw_hdmi-imx.o +obj-$(CONFIG_DRM_IMX_MIPI_DSI) += dw_mipi_dsi-imx.o diff --git a/drivers/gpu/drm/imx/dw_mipi_dsi-imx.c b/drivers/gpu/drm/imx/dw_mipi_dsi-imx.c new file mode 100644 index 0000000..5e6f62d --- /dev/null +++ b/drivers/gpu/drm/imx/dw_mipi_dsi-imx.c @@ -0,0 +1,230 @@ +/* + * i.MX drm driver - MIPI DSI Host Controller + * + * Copyright (C) 2011-2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/component.h> +#include <linux/mfd/syscon.h> +#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> +#include <linux/module.h> +#include <linux/of_device.h> +#include <linux/regmap.h> +#include <linux/videodev2.h> +#include <drm/bridge/dw_mipi_dsi.h> +#include <drm/drm_crtc_helper.h> +#include <drm/drm_mipi_dsi.h> + +#include "imx-drm.h" + +#define DRIVER_NAME "imx-mipi-dsi" + +struct imx_mipi_dsi { + struct drm_encoder encoder; + struct device *dev; + struct regmap *regmap; +}; + +static inline struct imx_mipi_dsi *enc_to_dsi(struct drm_encoder *enc) +{ + return container_of(enc, struct imx_mipi_dsi, encoder); +} + +static void imx_mipi_dsi_set_ipu_di_mux(struct imx_mipi_dsi *dsi, int ipu_di) +{ + regmap_update_bits(dsi->regmap, IOMUXC_GPR3, + IMX6Q_GPR3_MIPI_MUX_CTL_MASK, + ipu_di << IMX6Q_GPR3_MIPI_MUX_CTL_SHIFT); +} + +static struct drm_encoder_funcs imx_mipi_dsi_encoder_funcs = { + .destroy = imx_drm_encoder_destroy, +}; + +static bool imx_mipi_dsi_encoder_mode_fixup(struct drm_encoder *encoder, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + return true; +} + +static void imx_mipi_dsi_encoder_prepare(struct drm_encoder *encoder) +{ + u32 encoder_pix_fmt, interface_pix_fmt; + + encoder_pix_fmt = dw_mipi_dsi_get_encoder_pixel_format(encoder); + + switch (encoder_pix_fmt) { + case MIPI_DSI_FMT_RGB888: + interface_pix_fmt = V4L2_PIX_FMT_RGB24; + break; + case MIPI_DSI_FMT_RGB565: + interface_pix_fmt = V4L2_PIX_FMT_RGB565; + break; + default: + BUG(); + return; + } + + imx_drm_panel_format(encoder, interface_pix_fmt); +} + +static void imx_mipi_dsi_encoder_mode_set(struct drm_encoder *encoder, + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ +} + +static void imx_mipi_dsi_encoder_commit(struct drm_encoder *encoder) +{ + struct imx_mipi_dsi *dsi = enc_to_dsi(encoder); + int mux = imx_drm_encoder_get_mux_id(dsi->dev->of_node, encoder); + + imx_mipi_dsi_set_ipu_di_mux(dsi, mux); +} + +static void imx_mipi_dsi_encoder_disable(struct drm_encoder *encoder) +{ +} + +static struct drm_encoder_helper_funcs imx_mipi_dsi_encoder_helper_funcs = { + .mode_fixup = imx_mipi_dsi_encoder_mode_fixup, + .prepare = imx_mipi_dsi_encoder_prepare, + .mode_set = imx_mipi_dsi_encoder_mode_set, + .commit = imx_mipi_dsi_encoder_commit, + .disable = imx_mipi_dsi_encoder_disable, +}; + +static int imx_mipi_dsi_register(struct drm_device *drm, + struct imx_mipi_dsi *dsi) +{ + int ret; + + ret = imx_drm_encoder_parse_of(drm, &dsi->encoder, dsi->dev->of_node); + if (ret) + return ret; + + drm_encoder_helper_add(&dsi->encoder, + &imx_mipi_dsi_encoder_helper_funcs); + drm_encoder_init(drm, &dsi->encoder, &imx_mipi_dsi_encoder_funcs, + DRM_MODE_ENCODER_DSI); + return 0; +} + +static enum drm_mode_status imx_mipi_dsi_mode_valid( + struct drm_connector *connector, + struct drm_display_mode *mode) +{ + /* + * The VID_PKT_SIZE field in the DSI_VID_PKT_CFG + * register is 11-bit. + */ + if (mode->hdisplay > 0x7ff) + return MODE_BAD_HVALUE; + + /* + * The V_ACTIVE_LINES field in the DSI_VTIMING_CFG + * register is 11-bit. + */ + if (mode->vdisplay > 0x7ff) + return MODE_BAD_VVALUE; + + return MODE_OK; +} + +static struct dw_mipi_dsi_plat_data imx6q_mipi_dsi_drv_data = { + .max_data_lanes = 2, + .mode_valid = imx_mipi_dsi_mode_valid, +}; + +static const struct of_device_id imx_mipi_dsi_dt_ids[] = { + { + .compatible = "fsl,imx6q-mipi-dsi", + .data = &imx6q_mipi_dsi_drv_data, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, imx_mipi_dsi_dt_ids); + +static int imx_mipi_dsi_bind(struct device *dev, struct device *master, + void *data) +{ + struct platform_device *pdev = to_platform_device(dev); + const struct of_device_id *of_id = + of_match_device(imx_mipi_dsi_dt_ids, dev); + const struct dw_mipi_dsi_plat_data *pdata = of_id->data; + struct drm_device *drm = data; + struct device_node *np = dev->of_node; + struct imx_mipi_dsi *dsi; + struct resource *res; + int ret; + + dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); + if (!dsi) + return -ENOMEM; + + dsi->dev = dev; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + dsi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr"); + if (IS_ERR(dsi->regmap)) + return PTR_ERR(dsi->regmap); + + ret = imx_mipi_dsi_register(drm, dsi); + if (ret) + return ret; + + dev_set_drvdata(dev, dsi); + + return dw_mipi_dsi_bind(dev, master, data, &dsi->encoder, res, pdata); +} + +static void imx_mipi_dsi_unbind(struct device *dev, struct device *master, + void *data) +{ + return dw_mipi_dsi_unbind(dev, master, data); +} + +static const struct component_ops imx_mipi_dsi_ops = { + .bind = imx_mipi_dsi_bind, + .unbind = imx_mipi_dsi_unbind, +}; + +static int imx_mipi_dsi_probe(struct platform_device *pdev) +{ + return component_add(&pdev->dev, &imx_mipi_dsi_ops); +} + +static int imx_mipi_dsi_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &imx_mipi_dsi_ops); + return 0; +} + +static struct platform_driver imx_mipi_dsi_driver = { + .probe = imx_mipi_dsi_probe, + .remove = imx_mipi_dsi_remove, + .driver = { + .of_match_table = imx_mipi_dsi_dt_ids, + .name = DRIVER_NAME, + }, +}; +module_platform_driver(imx_mipi_dsi_driver); + +MODULE_DESCRIPTION("i.MX MIPI DSI host controller driver"); +MODULE_AUTHOR("Liu Ying Ying.Liu@freescale.com"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRIVER_NAME);