To avoid duplicate logic for the same: There is a function in drm-core to calculate display timing parameters: horizontal front porch, back porch, sync length, vertical front porch, back porch, sync length and clock in Hz. However, some drivers are still calculating these parameters themselves. Therefore, there is a duplication of the code. This patch series replaces this redundant code with the function drm_display_mode_to_videomode. This removes nearly 100 redundant lines from the related drivers.
Signed-off-by: Satendra Singh Thakur satendra.t@samsung.com Cc: Madhur Verma madhur.verma@samsung.com Cc: Hemanshu Srivastava hemanshu.s@samsung.com --- drivers/gpu/drm/bridge/adv7511/adv7533.c | 35 ++++++++++++++------------------ 1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7533.c b/drivers/gpu/drm/bridge/adv7511/adv7533.c index 185b6d8..881a703 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7533.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7533.c @@ -14,6 +14,7 @@ #include <linux/of_graph.h>
#include "adv7511.h" +#include <video/videomode.h>
static const struct reg_sequence adv7533_fixed_registers[] = { { 0x16, 0x20 }, @@ -36,15 +37,9 @@ static void adv7511_dsi_config_timing_gen(struct adv7511 *adv) { struct mipi_dsi_device *dsi = adv->dsi; struct drm_display_mode *mode = &adv->curr_mode; - unsigned int hsw, hfp, hbp, vsw, vfp, vbp; + struct videomode vm; u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */ - - hsw = mode->hsync_end - mode->hsync_start; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - vsw = mode->vsync_end - mode->vsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; + drm_display_mode_to_videomode(mode, &vm);
/* set pixel clock divider mode */ regmap_write(adv->regmap_cec, 0x16, @@ -53,22 +48,22 @@ static void adv7511_dsi_config_timing_gen(struct adv7511 *adv) /* horizontal porch params */ regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4); regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x2a, hsw >> 4); - regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x2c, hfp >> 4); - regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x2e, hbp >> 4); - regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x2a, vm.hsync_len >> 4); + regmap_write(adv->regmap_cec, 0x2b, (vm.hsync_len << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x2c, vm.hfront_porch >> 4); + regmap_write(adv->regmap_cec, 0x2d, (vm.hfront_porch << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x2e, vm.hback_porch >> 4); + regmap_write(adv->regmap_cec, 0x2f, (vm.hback_porch << 4) & 0xff);
/* vertical porch params */ regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4); regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x32, vsw >> 4); - regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x34, vfp >> 4); - regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff); - regmap_write(adv->regmap_cec, 0x36, vbp >> 4); - regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x32, vm.vsync_len >> 4); + regmap_write(adv->regmap_cec, 0x33, (vm.vsync_len << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x34, vm.vfront_porch >> 4); + regmap_write(adv->regmap_cec, 0x35, (vm.vfront_porch << 4) & 0xff); + regmap_write(adv->regmap_cec, 0x36, vm.vback_porch >> 4); + regmap_write(adv->regmap_cec, 0x37, (vm.vback_porch << 4) & 0xff); }
void adv7533_dsi_power_on(struct adv7511 *adv)