Hey Doug,
Thanks for submitting this.
On Wed, 28 Jul 2021 at 18:46, Douglas Anderson dianders@chromium.org wrote:
The manual has always said that we need 100 us delays in a few places. Though it hasn't seemed to be a big deal to skip these, let's add them in case it makes something happier.
NOTE: this fixes no known issues but it seems good to make it right.
Signed-off-by: Douglas Anderson dianders@chromium.org
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 5e932070a1c3..cd0fccdd8dfd 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -307,6 +307,9 @@ static int __maybe_unused ti_sn65dsi86_resume(struct device *dev) return ret; }
/* td2: min 100 us after regulators before enabling the GPIO */
usleep_range(100, 110);
gpiod_set_value(pdata->enable_gpio, 1); /*
@@ -1096,6 +1099,9 @@ static void ti_sn_bridge_pre_enable(struct drm_bridge *bridge)
if (!pdata->refclk) ti_sn65dsi86_enable_comms(pdata);
/* td7: min 100 us after enable before DSI data */
usleep_range(100, 110);
}
static void ti_sn_bridge_post_disable(struct drm_bridge *bridge)
2.32.0.432.gabb21c7263-goog
Acked-by: Robert Foss robert.foss@linaro.org