The shared Memory Controller lock isn't needed since the time when Memory Clock was made read-only. The lock could be removed safely now. Hence let's remove it, this will help a tad to make further patches cleaner.
Signed-off-by: Dmitry Osipenko digetx@gmail.com --- drivers/clk/tegra/clk-divider.c | 4 ++-- drivers/clk/tegra/clk-tegra114.c | 6 ++---- drivers/clk/tegra/clk-tegra124.c | 7 ++----- drivers/clk/tegra/clk-tegra20.c | 3 +-- drivers/clk/tegra/clk-tegra30.c | 3 +-- drivers/clk/tegra/clk.h | 2 +- 6 files changed, 9 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 38daf483ddf1..56adb01638cc 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -177,10 +177,10 @@ static const struct clk_div_table mc_div_table[] = { };
struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, - void __iomem *reg, spinlock_t *lock) + void __iomem *reg) { return clk_register_divider_table(NULL, name, parent_name, CLK_IS_CRITICAL, reg, 16, 1, CLK_DIVIDER_READ_ONLY, - mc_div_table, lock); + mc_div_table, NULL); } diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index bc9e47a4cb60..ca8d9737d301 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -134,7 +134,6 @@ static DEFINE_SPINLOCK(pll_d_lock); static DEFINE_SPINLOCK(pll_d2_lock); static DEFINE_SPINLOCK(pll_u_lock); static DEFINE_SPINLOCK(pll_re_lock); -static DEFINE_SPINLOCK(emc_lock);
static struct div_nmp pllxc_nmp = { .divm_shift = 0, @@ -1050,10 +1049,9 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base, ARRAY_SIZE(mux_pllmcp_clkm), CLK_SET_RATE_NO_REPARENT, clk_base + CLK_SOURCE_EMC, - 29, 3, 0, &emc_lock); + 29, 3, 0, NULL);
- clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, - &emc_lock); + clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC); clks[TEGRA114_CLK_MC] = clk;
clk = tegra_clk_register_periph_gate("mipi-cal", "clk_m", 0, clk_base, diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index e931319dcc9d..0c956e14b9ca 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -126,7 +126,6 @@ static DEFINE_SPINLOCK(pll_d_lock); static DEFINE_SPINLOCK(pll_e_lock); static DEFINE_SPINLOCK(pll_re_lock); static DEFINE_SPINLOCK(pll_u_lock); -static DEFINE_SPINLOCK(emc_lock); static DEFINE_SPINLOCK(sor0_lock);
/* possible OSC frequencies in Hz */ @@ -1050,8 +1049,7 @@ static __init void tegra124_periph_clk_init(void __iomem *clk_base, periph_clk_enb_refcnt); clks[TEGRA124_CLK_DSIB] = clk;
- clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, - &emc_lock); + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC); clks[TEGRA124_CLK_MC] = clk;
/* cml0 */ @@ -1518,8 +1516,7 @@ static void __init tegra124_132_clock_init_post(struct device_node *np) tegra124_reset_deassert); tegra_add_of_provider(np, of_clk_src_onecell_get);
- clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np, - &emc_lock); + clks[TEGRA124_CLK_EMC] = tegra_clk_register_emc(clk_base, np, NULL);
tegra_register_devclks(devclks, ARRAY_SIZE(devclks));
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 3efc651b42e3..2f8b6de4198f 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -802,8 +802,7 @@ static void __init tegra20_periph_clk_init(void)
clks[TEGRA20_CLK_EMC] = clk;
- clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, - NULL); + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC); clks[TEGRA20_CLK_MC] = clk;
/* dsi */ diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 37244a7e68c2..88e8c485f8ae 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1042,8 +1042,7 @@ static void __init tegra30_periph_clk_init(void)
clks[TEGRA30_CLK_EMC] = clk;
- clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, - NULL); + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC); clks[TEGRA30_CLK_MC] = clk;
/* cml0 */ diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 6b565f6b5f66..5ed8b95d331c 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -136,7 +136,7 @@ struct clk *tegra_clk_register_divider(const char *name, unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width, spinlock_t *lock); struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, - void __iomem *reg, spinlock_t *lock); + void __iomem *reg);
/* * Tegra PLL: