On 2021-12-03 at 12:24:22 +0000, Matthew Auld wrote:
Ensure we add the engine base only after we calculate the qword offset into the PTE window.
So we didn't hit this issue because we were always using the engine->instance 0!?
Looks good to me
Reviewed-by: Ramalingam C ramalingam.c@intel.com
Signed-off-by: Matthew Auld matthew.auld@intel.com Cc: Thomas Hellström thomas.hellstrom@linux.intel.com Cc: Ramalingam C ramalingam.c@intel.com
drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index d553b76b1168..cb0bb3b94644 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -284,10 +284,10 @@ static int emit_pte(struct i915_request *rq, GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
/* Compute the page directory offset for the target address range */
- offset += (u64)rq->engine->instance << 32; offset >>= 12; offset *= sizeof(u64); offset += 2 * CHUNK_SZ;
offset += (u64)rq->engine->instance << 32;
cs = intel_ring_begin(rq, 6); if (IS_ERR(cs))
-- 2.31.1