On Tue, Apr 10, 2012 at 10:47:49AM +0200, Jiri Slaby wrote:
On 04/09/2012 07:11 PM, Jesse Barnes wrote:
On Fri, 30 Mar 2012 11:45:43 +0100 Chris Wilson chris@chris-wilson.co.uk wrote:
On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby jslaby@suse.cz wrote:
I don't know what to dump more, because iir is obviously zero too. What other sources of interrupts are on the (G33) chip?
IIR is the master interrupt, with chained secondary interrupt statuses. If IIR is 0, the interrupt wasn't raised by the GPU.
I've actually seen cases where one of the PIPE*STAT regs is stuck, and even if IIR is 0 we still get interrupts... Jiri can you verify the PIPE*STAT regs have bits set, maybe one or more we don't check for?
Note that I already attached their contents... This is what is in them (pipes 0 and 1): [ 3572.968581] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3572.977472] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3576.224839] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3576.243558] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3576.384912] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3576.403462] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3577.464100] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3577.477383] i915_driver_irq_handler: 0=00000000 1=00000000 [ 3577.829016] i915_driver_irq_handler: 0=00020000 1=00000000 [ 3577.830093] i915_driver_irq_handler: 0=00020000 1=00000000
I.e. the handler is called when IIR=0 and both pipe stats are 0.
Hm, can you also dump the PORT_HOTPLUG_STAT register? That's the only other subordinate interrupt source left. -Daniel