From: Michael Riesch michael.riesch@wolfvision.net
Enable the RK356x Video Output Processor (VOP) 2 on the Pine64 Quartz64 Model A.
Signed-off-by: Michael Riesch michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer s.hauer@pengutronix.de ---
Notes: Changes since v5: - Drop reg property from single endpoint node
Changes since v4: - Sort nodes alphabetically
Changes since v3: - Fix HDMI connector type
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index dd7f4b9b686b8..6504f7ab3ea77 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> #include "rk3566.dtsi"
/ { @@ -35,6 +36,17 @@ fan: gpio_fan { #cooling-cells = <2>; };
+ hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + leds { compatible = "gpio-leds";
@@ -248,6 +260,24 @@ &gpu { status = "okay"; };
+&hdmi { + avdd-0v9-supply = <&vdda_0v9>; + avdd-1v8-supply = <&vcc_1v8>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + &i2c0 { status = "okay";
@@ -685,3 +715,20 @@ &usb2phy1_otg { phy-supply = <&vcc5v0_usb20_host>; status = "okay"; }; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +};