++Laurent ,Dmitry, Abhinav and Rob
-----Original Message----- From: Kandpal, Suraj suraj.kandpal@intel.com Sent: Thursday, April 21, 2022 10:38 AM To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org Cc: Nikula, Jani jani.nikula@intel.com; ville.syrjala@linux.intel.com; Murthy, Arun R arun.r.murthy@intel.com; Kandpal, Suraj suraj.kandpal@intel.com Subject: [RFC PATCH 2/3] drm/i915: Define WD trancoder for i915
Adding WD Types, WD transcoder to enum list and WD Transcoder offsets
Signed-off-by: Suraj Kandpal suraj.kandpal@intel.com
drivers/gpu/drm/i915/display/intel_display.h | 6 ++++++ drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 2 ++ 3 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 8513703086b7..8c93a5de8e07 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -119,6 +119,8 @@ enum transcoder { TRANSCODER_DSI_1, TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */ TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
TRANSCODER_WD_0,
TRANSCODER_WD_1,
I915_MAX_TRANSCODERS
}; @@ -140,6 +142,10 @@ static inline const char *transcoder_name(enum transcoder transcoder) return "DSI A"; case TRANSCODER_DSI_C: return "DSI C";
- case TRANSCODER_WD_0:
return "WD 0";- case TRANSCODER_WD_1:
return "WD 1";diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 7a96ecba73c0..dcb4ad43cf88 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -79,6 +79,7 @@ enum intel_output_type { INTEL_OUTPUT_DSI = 9, INTEL_OUTPUT_DDI = 10, INTEL_OUTPUT_DP_MST = 11,
- INTEL_OUTPUT_WD = 12,
};
enum hdmi_force_audio { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ddbc7a685a50..6396afd77209 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2023,6 +2023,8 @@ #define TRANSCODER_EDP_OFFSET 0x6f000 #define TRANSCODER_DSI0_OFFSET 0x6b000 #define TRANSCODER_DSI1_OFFSET 0x6b800 +#define TRANSCODER_WD0_OFFSET 0x6e000 +#define TRANSCODER_WD1_OFFSET 0x6e800
#define HTOTAL(trans) _MMIO_TRANS2(trans, _HTOTAL_A)
#define HBLANK(trans) _MMIO_TRANS2(trans, _HBLANK_A)
2.35.1