This adds the required bits to the ipu-v3 and imx-drm driver to make scanout of the Vivante (super-)tiled single buffer format work on i.MX6 QuadPlus. A userspace taking advantage of this support is able to skip the linear resolve step in the GPU, saving quite a lot of memory bandwidth especially with higher resolution displays.
The first 3 patches can go in as-is, while the last patch depends on Ben Widawsky's series to add a format modifier blob property to the DRM planes.
Regards, Lucas
Lucas Stach (4): gpu: ipu-v3: pre: add tiled prefetch support gpu: ipu-v3: prg: add modifier support drm/imx: add FB modifier support drm/imx: advertise supported plane format modifiers
drivers/gpu/drm/imx/imx-drm-core.c | 1 + drivers/gpu/drm/imx/ipuv3-plane.c | 92 +++++++++++++++++++++++++++++++++++--- drivers/gpu/ipu-v3/ipu-pre.c | 24 +++++++++- drivers/gpu/ipu-v3/ipu-prg.c | 13 ++++-- drivers/gpu/ipu-v3/ipu-prv.h | 4 +- include/video/imx-ipu-v3.h | 2 +- 6 files changed, 122 insertions(+), 14 deletions(-)