On Tue, Oct 15, 2019 at 09:10:36AM +0000, Lowry Li (Arm Technology China) wrote:
Sets output color format according to the connector formats and display supported formats. Default value is RGB444 and only force YUV format which must be YUV.
Signed-off-by: Lowry Li (Arm Technology China) lowry.li@arm.com
.../drm/arm/display/komeda/d71/d71_component.c | 14 +++++++++++++- .../gpu/drm/arm/display/komeda/komeda_crtc.c | 9 ++++++++- drivers/gpu/drm/arm/display/komeda/komeda_kms.h | 2 +- .../drm/arm/display/komeda/komeda_pipeline.h | 2 +- .../arm/display/komeda/komeda_pipeline_state.c | 17 ++++++++++++++--- .../arm/display/komeda/komeda_wb_connector.c | 1 + 6 files changed, 38 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c index 27cdb03573c1..7b374a3b911e 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c @@ -944,7 +944,7 @@ static void d71_improc_update(struct komeda_component *c, { struct komeda_improc_state *st = to_improc_st(state); u32 __iomem *reg = c->reg;
- u32 index;
u32 index, mask = 0, ctrl = 0;
for_each_changed_input(state, index) malidp_write32(reg, BLK_INPUT_ID0 + index * 4,
@@ -952,6 +952,18 @@ static void d71_improc_update(struct komeda_component *c,
malidp_write32(reg, BLK_SIZE, HV_SIZE(st->hsize, st->vsize)); malidp_write32(reg, IPS_DEPTH, st->color_depth);
- mask |= IPS_CTRL_YUV | IPS_CTRL_CHD422 | IPS_CTRL_CHD420;
- /* config color format */
- if (st->color_format == DRM_COLOR_FORMAT_YCRCB420)
ctrl |= IPS_CTRL_YUV | IPS_CTRL_CHD422 | IPS_CTRL_CHD420;- else if (st->color_format == DRM_COLOR_FORMAT_YCRCB422)
ctrl |= IPS_CTRL_YUV | IPS_CTRL_CHD422;- else if (st->color_format == DRM_COLOR_FORMAT_YCRCB444)
ctrl |= IPS_CTRL_YUV;- malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl);
}
static void d71_improc_dump(struct komeda_component *c, struct seq_file *sf) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c index fe295c4fca71..c9b8d2d5e195 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -18,10 +18,11 @@ #include "komeda_kms.h"
void komeda_crtc_get_color_config(struct drm_crtc_state *crtc_st,
u32 *color_depths)
u32 *color_depths, u32 *color_formats){ struct drm_connector *conn; struct drm_connector_state *conn_st;
u32 conn_color_formats = ~0u; int i, min_bpc = 31, conn_bpc = 0;
for_each_new_connector_in_state(crtc_st->state, conn, conn_st, i) {
@@ -29,12 +30,18 @@ void komeda_crtc_get_color_config(struct drm_crtc_state *crtc_st, continue;
conn_bpc = conn->display_info.bpc ? conn->display_info.bpc : 8;
conn_color_formats &= conn->display_info.color_formats;if (conn_bpc < min_bpc) min_bpc = conn_bpc; }
/* connector doesn't config any color_format, use RGB444 as default */
if (!conn_color_formats)
conn_color_formats = DRM_COLOR_FORMAT_RGB444;*color_depths = GENMASK(min_bpc, 0);
*color_formats = conn_color_formats;
}
static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h index a42503451b5d..456f3c435719 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h @@ -167,7 +167,7 @@ static inline bool has_flip_h(u32 rot) }
void komeda_crtc_get_color_config(struct drm_crtc_state *crtc_st,
u32 *color_depths);
u32 *color_depths, u32 *color_formats);unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state *kcrtc_st);
int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev); diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h index 7653f134a8eb..c0f53b19b62d 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h @@ -323,7 +323,7 @@ struct komeda_improc {
struct komeda_improc_state { struct komeda_component_state base;
- u8 color_depth;
- u8 color_format, color_depth; u16 hsize, vsize;
};
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c index e64bfeaa06c7..948d1951c8eb 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c @@ -758,10 +758,11 @@ komeda_improc_validate(struct komeda_improc *improc, st->vsize = dflow->in_h;
if (drm_atomic_crtc_needs_modeset(crtc_st)) {
u32 output_depths;u32 avail_depths;
u32 output_depths, output_formats;u32 avail_depths, avail_formats;
komeda_crtc_get_color_config(crtc_st, &output_depths);
komeda_crtc_get_color_config(crtc_st, &output_depths,&output_formats);avail_depths = output_depths & improc->supported_color_depths; if (avail_depths == 0) {
@@ -771,7 +772,17 @@ komeda_improc_validate(struct komeda_improc *improc, return -EINVAL; }
avail_formats = output_formats &improc->supported_color_formats;if (!avail_formats) {DRM_DEBUG_ATOMIC("No available color_formats, conn formats 0x%x & display: 0x%x\n",output_formats,improc->supported_color_formats);return -EINVAL;}st->color_depth = __fls(avail_depths);
st->color_format = BIT(__ffs(avail_formats));}
komeda_component_add_input(&st->base, &dflow->input, 0);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c index 740a81250630..abfa587db189 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c @@ -174,6 +174,7 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms,
info = &kwb_conn->base.base.display_info; info->bpc = __fls(kcrtc->master->improc->supported_color_depths);
info->color_formats = kcrtc->master->improc->supported_color_formats;
kcrtc->wb_conn = kwb_conn;
Looks good to me.
Reviewed-by: James Qian Wang (Arm Technology China) james.qian.wang@arm.com