On Thu, Jul 25, 2013 at 03:15:15PM -0700, Keith Packard wrote:
Just copies the IVB code
Signed-off-by: Keith Packard keithp@keithp.com
drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 166aa2c..4a118c3 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7465,20 +7465,29 @@ static int intel_gen6_queue_flip(struct drm_device *dev, struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_ring_buffer *ring = &dev_priv->ring[RCS]; uint32_t pf, pipesrc;
uint32_t cmd;
uint32_t base; int ret;
ret = intel_pin_and_fence_fb_obj(dev, obj, ring); if (ret) goto err;
cmd = MI_DISPLAY_FLIP | MI_DISPLAY_FLIP_PLANE(intel_crtc->plane);
base = i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset;
if (flags & DRM_MODE_PAGE_FLIP_ASYNC) {
cmd |= MI_DISPLAY_FLIP_ASYNC_INDICATOR;base |= MI_DISPLAY_FLIP_TYPE_ASYNC;}
ret = intel_ring_begin(ring, 4); if (ret) goto err_unpin;
- intel_ring_emit(ring, MI_DISPLAY_FLIP |
MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- intel_ring_emit(ring, cmd); intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode);
- intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
intel_ring_emit(ring, base);
/* Contrary to the suggestions in the documentation,
- "Enable Panel Fitter" does not seem to be required when page
This PF flip stuff is a bit of a mystery. I'm not sure it exists on SNB anymore. Some of the docs say that it's MBZ for SNB/IVB. Gen4/5 docs say that DW3 must not be sent w/ async flips, and some SNB+ docs say that it must not be sent with either sync or async flips.
Did you test this patch on actual hardware, and if so did it work as expected? :)
I guess one would need to perform some empirical testing to figure out what DW3 actually does.
@@ -9731,7 +9740,7 @@ void intel_modeset_init(struct drm_device *dev) dev->mode_config.max_height = 8192; }
- if (IS_GEN7(dev))
if (IS_GEN6(dev) || IS_GEN7(dev)) dev->mode_config.async_page_flip = true;
dev->mode_config.fb_base = dev_priv->gtt.mappable_base;
-- 1.8.3.2
Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx