From: Michael Riesch michael.riesch@wolfvision.net
Enable the RK356x Video Output Processor (VOP) 2 on the Pine64 Quartz64 Model A.
Signed-off-by: Michael Riesch michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer s.hauer@pengutronix.de --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 4d4b2a301b1a4..ccebd6bb19cea 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> #include "rk3566.dtsi"
/ { @@ -205,6 +206,12 @@ &gmac1m0_clkinout status = "okay"; };
+&hdmi { + avdd-0v9-supply = <&vdda_0v9>; + avdd-1v8-supply = <&vcc_1v8>; + status = "okay"; +}; + &i2c0 { status = "okay";
@@ -546,3 +553,27 @@ bluetooth { &uart2 { status = "okay"; }; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&vp0 { + vp0_out_hdmi: endpoint@RK3568_VOP2_EP_HDMI { + reg = <RK3568_VOP2_EP_HDMI>; + remote-endpoint = <&hdmi_in_vp0>; + }; +};