As mentioned previously, and in the discussion with Ben, the page tables
would not need to be rebuilt on each CS. They would be rebuilt only on the
first CS following a move_notify that caused a page table invalidation.
move_notify:
if (is_incompatible(new_mem_type)) {
bo->page_tables_invalid = true;
invalidate_page_tables(bo);
}
command_submission:
if (bo->page_tables_invalid) {
set_up_page_tables(bo);
bo->page_tables_invalid = false;
}
Why is it different from updating page table in move notify ? I don't
see any bonus here, all the information we need are already available
in move_notify.
Memory types in TTM are completely orthogonal to allowed GPU usage. The GPU
may access a bo if it's reserved, fenced or pinned, regardless of its
placement.
A TT memory type is a *single* GPU aperture that may be mapped from the
aperture side by the CPU (AGP). It may also be used by a single unmappable
aperture that wants to use TTM's range management and eviction (vmwgfx GMR).
The driver can define more than one such memory type (psb), but a bo can
only be placed in one of those at a time, so this approach is unsuitable for
multiple apertures pointing to the same pages.
radeon virtual memory have a special address space, the system address
space, it's managed by ttm through a TTM_TT (exact same code as
current one). All the other address space are not managed by ttm but
we require a bo to be bound to ttm_tt to be use, thought we can relax
that. That's the reason why i consider system placement as different.